: /** * @brief The application entry point. * @retval int */ int main(void) { 800031c: b580 push {r7, lr} 800031e: b088 sub sp, #32 8000320: af04 add r7, sp, #16 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8000322: f000 ff35 bl 8001190 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8000326: f000 f867 bl 80003f8 /* Configure the peripherals common clocks */ PeriphCommonClock_Config(); 800032a: f000 f8c1 bl 80004b0 /* IPCC initialisation */ MX_IPCC_Init(); 800032e: f000 f91d bl 800056c /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8000332: f000 f9dd bl 80006f0 MX_RTC_Init(); 8000336: f000 f935 bl 80005a4 MX_SPI1_Init(); 800033a: f000 f99b bl 8000674 MX_I2C1_Init(); 800033e: f000 f8d7 bl 80004f0 MX_RF_Init(); 8000342: f000 f927 bl 8000594 /* USER CODE BEGIN 2 */ set_up_fonts(); 8000346: f7ff ff73 bl 8000230 SharpMem_Init(); 800034a: f000 fa3d bl 80007c8 uint8_t started = 0; 800034e: 2300 movs r3, #0 8000350: 73fb strb r3, [r7, #15] //SHARPMEM_write(&lcd, "Boot", 0, 0,0, true, false); //SHARPMEM_refresh_display(&lcd); HAL_Delay(5000); 8000352: f241 3088 movw r0, #5000 @ 0x1388 8000356: f000 ffa1 bl 800129c while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ if (!started){ 800035a: 7bfb ldrb r3, [r7, #15] 800035c: 2b00 cmp r3, #0 800035e: d101 bne.n 8000364 GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);*/ started = 1; 8000360: 2301 movs r3, #1 8000362: 73fb strb r3, [r7, #15] } HAL_RTC_GetTime(&hrtc, &sTime, RTC_FORMAT_BIN); 8000364: 2200 movs r2, #0 8000366: 491e ldr r1, [pc, #120] @ (80003e0 ) 8000368: 481e ldr r0, [pc, #120] @ (80003e4 ) 800036a: f003 fbc4 bl 8003af6 HAL_RTC_GetDate(&hrtc, &sDate, RTC_FORMAT_BIN); 800036e: 2200 movs r2, #0 8000370: 491d ldr r1, [pc, #116] @ (80003e8 ) 8000372: 481c ldr r0, [pc, #112] @ (80003e4 ) 8000374: f003 fca6 bl 8003cc4 char timestr[15]; sprintf(timestr, "%i:%i:%i", sTime.Hours, sTime.Minutes, sTime.Seconds); 8000378: 4b19 ldr r3, [pc, #100] @ (80003e0 ) 800037a: 781b ldrb r3, [r3, #0] 800037c: 461a mov r2, r3 800037e: 4b18 ldr r3, [pc, #96] @ (80003e0 ) 8000380: 785b ldrb r3, [r3, #1] 8000382: 4619 mov r1, r3 8000384: 4b16 ldr r3, [pc, #88] @ (80003e0 ) 8000386: 789b ldrb r3, [r3, #2] 8000388: 4638 mov r0, r7 800038a: 9300 str r3, [sp, #0] 800038c: 460b mov r3, r1 800038e: 4917 ldr r1, [pc, #92] @ (80003ec ) 8000390: f004 fb38 bl 8004a04 started++; 8000394: 7bfb ldrb r3, [r7, #15] 8000396: 3301 adds r3, #1 8000398: 73fb strb r3, [r7, #15] SHARPMEM_clear_display_buffer(&lcd); 800039a: 4815 ldr r0, [pc, #84] @ (80003f0 ) 800039c: f000 fc75 bl 8000c8a SHARPMEM_write(&lcd, timestr, 0, 30, 20, true, false); 80003a0: 4639 mov r1, r7 80003a2: 2300 movs r3, #0 80003a4: 9302 str r3, [sp, #8] 80003a6: 2301 movs r3, #1 80003a8: 9301 str r3, [sp, #4] 80003aa: 2314 movs r3, #20 80003ac: 9300 str r3, [sp, #0] 80003ae: 231e movs r3, #30 80003b0: 2200 movs r2, #0 80003b2: 480f ldr r0, [pc, #60] @ (80003f0 ) 80003b4: f000 fac0 bl 8000938 SHARPMEM_refresh_display(&lcd); 80003b8: 480d ldr r0, [pc, #52] @ (80003f0 ) 80003ba: f000 fbb9 bl 8000b30 //HAL_Delay(900); HAL_SuspendTick(); 80003be: f000 ff91 bl 80012e4 HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI); 80003c2: 2001 movs r0, #1 80003c4: f001 fcda bl 8001d7c HAL_RTCEx_DeactivateWakeUpTimer(&hrtc); 80003c8: 4806 ldr r0, [pc, #24] @ (80003e4 ) 80003ca: f003 fe57 bl 800407c __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU); 80003ce: 4b09 ldr r3, [pc, #36] @ (80003f4 ) 80003d0: 221f movs r2, #31 80003d2: 619a str r2, [r3, #24] SystemClock_Config(); 80003d4: f000 f810 bl 80003f8 HAL_ResumeTick(); 80003d8: f000 ff94 bl 8001304 { 80003dc: e7bd b.n 800035a 80003de: bf00 nop 80003e0: 20000770 .word 0x20000770 80003e4: 20000818 .word 0x20000818 80003e8: 20000784 .word 0x20000784 80003ec: 08005200 .word 0x08005200 80003f0: 20000750 .word 0x20000750 80003f4: 58000400 .word 0x58000400 080003f8 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80003f8: b580 push {r7, lr} 80003fa: b09a sub sp, #104 @ 0x68 80003fc: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 80003fe: f107 0320 add.w r3, r7, #32 8000402: 2248 movs r2, #72 @ 0x48 8000404: 2100 movs r1, #0 8000406: 4618 mov r0, r3 8000408: f004 fb1e bl 8004a48 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800040c: 1d3b adds r3, r7, #4 800040e: 2200 movs r2, #0 8000410: 601a str r2, [r3, #0] 8000412: 605a str r2, [r3, #4] 8000414: 609a str r2, [r3, #8] 8000416: 60da str r2, [r3, #12] 8000418: 611a str r2, [r3, #16] 800041a: 615a str r2, [r3, #20] 800041c: 619a str r2, [r3, #24] /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); 800041e: f001 fc8f bl 8001d40 __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMHIGH); 8000422: 2010 movs r0, #16 8000424: f7ff ff4a bl 80002bc /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 8000428: 4b20 ldr r3, [pc, #128] @ (80004ac ) 800042a: 681b ldr r3, [r3, #0] 800042c: f423 63c0 bic.w r3, r3, #1536 @ 0x600 8000430: 4a1e ldr r2, [pc, #120] @ (80004ac ) 8000432: f443 7300 orr.w r3, r3, #512 @ 0x200 8000436: 6013 str r3, [r2, #0] 8000438: 4b1c ldr r3, [pc, #112] @ (80004ac ) 800043a: 681b ldr r3, [r3, #0] 800043c: f403 63c0 and.w r3, r3, #1536 @ 0x600 8000440: 603b str r3, [r7, #0] 8000442: 683b ldr r3, [r7, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE 8000444: 2307 movs r3, #7 8000446: 623b str r3, [r7, #32] |RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8000448: f44f 3380 mov.w r3, #65536 @ 0x10000 800044c: 627b str r3, [r7, #36] @ 0x24 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 800044e: 2301 movs r3, #1 8000450: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8000452: f44f 7380 mov.w r3, #256 @ 0x100 8000456: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8000458: 2340 movs r3, #64 @ 0x40 800045a: 633b str r3, [r7, #48] @ 0x30 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 800045c: 2300 movs r3, #0 800045e: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8000460: f107 0320 add.w r3, r7, #32 8000464: 4618 mov r0, r3 8000466: f002 f813 bl 8002490 800046a: 4603 mov r3, r0 800046c: 2b00 cmp r3, #0 800046e: d001 beq.n 8000474 { Error_Handler(); 8000470: f000 f9e2 bl 8000838 } /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2 8000474: 236f movs r3, #111 @ 0x6f 8000476: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; 8000478: 2302 movs r3, #2 800047a: 60bb str r3, [r7, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV16; 800047c: 23b0 movs r3, #176 @ 0xb0 800047e: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 8000480: 2300 movs r3, #0 8000482: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8000484: 2300 movs r3, #0 8000486: 617b str r3, [r7, #20] RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1; 8000488: 2300 movs r3, #0 800048a: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1; 800048c: 2300 movs r3, #0 800048e: 61fb str r3, [r7, #28] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 8000490: 1d3b adds r3, r7, #4 8000492: 2101 movs r1, #1 8000494: 4618 mov r0, r3 8000496: f002 fb6f bl 8002b78 800049a: 4603 mov r3, r0 800049c: 2b00 cmp r3, #0 800049e: d001 beq.n 80004a4 { Error_Handler(); 80004a0: f000 f9ca bl 8000838 } } 80004a4: bf00 nop 80004a6: 3768 adds r7, #104 @ 0x68 80004a8: 46bd mov sp, r7 80004aa: bd80 pop {r7, pc} 80004ac: 58000400 .word 0x58000400 080004b0 : /** * @brief Peripherals Common Clock Configuration * @retval None */ void PeriphCommonClock_Config(void) { 80004b0: b580 push {r7, lr} 80004b2: b094 sub sp, #80 @ 0x50 80004b4: af00 add r7, sp, #0 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 80004b6: 463b mov r3, r7 80004b8: 2250 movs r2, #80 @ 0x50 80004ba: 2100 movs r1, #0 80004bc: 4618 mov r0, r3 80004be: f004 fac3 bl 8004a48 /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP; 80004c2: f44f 5340 mov.w r3, #12288 @ 0x3000 80004c6: 603b str r3, [r7, #0] PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE; 80004c8: f44f 4380 mov.w r3, #16384 @ 0x4000 80004cc: 647b str r3, [r7, #68] @ 0x44 PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE; 80004ce: 2302 movs r3, #2 80004d0: 64bb str r3, [r7, #72] @ 0x48 PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1; 80004d2: 2310 movs r3, #16 80004d4: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 80004d6: 463b mov r3, r7 80004d8: 4618 mov r0, r3 80004da: f002 ff5e bl 800339a 80004de: 4603 mov r3, r0 80004e0: 2b00 cmp r3, #0 80004e2: d001 beq.n 80004e8 { Error_Handler(); 80004e4: f000 f9a8 bl 8000838 } /* USER CODE BEGIN Smps */ /* USER CODE END Smps */ } 80004e8: bf00 nop 80004ea: 3750 adds r7, #80 @ 0x50 80004ec: 46bd mov sp, r7 80004ee: bd80 pop {r7, pc} 080004f0 : * @brief I2C1 Initialization Function * @param None * @retval None */ static void MX_I2C1_Init(void) { 80004f0: b580 push {r7, lr} 80004f2: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; 80004f4: 4b1b ldr r3, [pc, #108] @ (8000564 ) 80004f6: 4a1c ldr r2, [pc, #112] @ (8000568 ) 80004f8: 601a str r2, [r3, #0] hi2c1.Init.Timing = 0x00000508; 80004fa: 4b1a ldr r3, [pc, #104] @ (8000564 ) 80004fc: f44f 62a1 mov.w r2, #1288 @ 0x508 8000500: 605a str r2, [r3, #4] hi2c1.Init.OwnAddress1 = 0; 8000502: 4b18 ldr r3, [pc, #96] @ (8000564 ) 8000504: 2200 movs r2, #0 8000506: 609a str r2, [r3, #8] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8000508: 4b16 ldr r3, [pc, #88] @ (8000564 ) 800050a: 2201 movs r2, #1 800050c: 60da str r2, [r3, #12] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 800050e: 4b15 ldr r3, [pc, #84] @ (8000564 ) 8000510: 2200 movs r2, #0 8000512: 611a str r2, [r3, #16] hi2c1.Init.OwnAddress2 = 0; 8000514: 4b13 ldr r3, [pc, #76] @ (8000564 ) 8000516: 2200 movs r2, #0 8000518: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 800051a: 4b12 ldr r3, [pc, #72] @ (8000564 ) 800051c: 2200 movs r2, #0 800051e: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8000520: 4b10 ldr r3, [pc, #64] @ (8000564 ) 8000522: 2200 movs r2, #0 8000524: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8000526: 4b0f ldr r3, [pc, #60] @ (8000564 ) 8000528: 2200 movs r2, #0 800052a: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) 800052c: 480d ldr r0, [pc, #52] @ (8000564 ) 800052e: f001 f9b5 bl 800189c 8000532: 4603 mov r3, r0 8000534: 2b00 cmp r3, #0 8000536: d001 beq.n 800053c { Error_Handler(); 8000538: f000 f97e bl 8000838 } /** Configure Analogue filter */ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 800053c: 2100 movs r1, #0 800053e: 4809 ldr r0, [pc, #36] @ (8000564 ) 8000540: f001 fa47 bl 80019d2 8000544: 4603 mov r3, r0 8000546: 2b00 cmp r3, #0 8000548: d001 beq.n 800054e { Error_Handler(); 800054a: f000 f975 bl 8000838 } /** Configure Digital filter */ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) 800054e: 2100 movs r1, #0 8000550: 4804 ldr r0, [pc, #16] @ (8000564 ) 8000552: f001 fa89 bl 8001a68 8000556: 4603 mov r3, r0 8000558: 2b00 cmp r3, #0 800055a: d001 beq.n 8000560 { Error_Handler(); 800055c: f000 f96c bl 8000838 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } 8000560: bf00 nop 8000562: bd80 pop {r7, pc} 8000564: 20000788 .word 0x20000788 8000568: 40005400 .word 0x40005400 0800056c : * @brief IPCC Initialization Function * @param None * @retval None */ static void MX_IPCC_Init(void) { 800056c: b580 push {r7, lr} 800056e: af00 add r7, sp, #0 /* USER CODE END IPCC_Init 0 */ /* USER CODE BEGIN IPCC_Init 1 */ /* USER CODE END IPCC_Init 1 */ hipcc.Instance = IPCC; 8000570: 4b06 ldr r3, [pc, #24] @ (800058c ) 8000572: 4a07 ldr r2, [pc, #28] @ (8000590 ) 8000574: 601a str r2, [r3, #0] if (HAL_IPCC_Init(&hipcc) != HAL_OK) 8000576: 4805 ldr r0, [pc, #20] @ (800058c ) 8000578: f001 fac2 bl 8001b00 800057c: 4603 mov r3, r0 800057e: 2b00 cmp r3, #0 8000580: d001 beq.n 8000586 { Error_Handler(); 8000582: f000 f959 bl 8000838 } /* USER CODE BEGIN IPCC_Init 2 */ /* USER CODE END IPCC_Init 2 */ } 8000586: bf00 nop 8000588: bd80 pop {r7, pc} 800058a: bf00 nop 800058c: 200007dc .word 0x200007dc 8000590: 58000c00 .word 0x58000c00 08000594 : * @brief RF Initialization Function * @param None * @retval None */ static void MX_RF_Init(void) { 8000594: b480 push {r7} 8000596: af00 add r7, sp, #0 /* USER CODE END RF_Init 1 */ /* USER CODE BEGIN RF_Init 2 */ /* USER CODE END RF_Init 2 */ } 8000598: bf00 nop 800059a: 46bd mov sp, r7 800059c: f85d 7b04 ldr.w r7, [sp], #4 80005a0: 4770 bx lr ... 080005a4 : * @brief RTC Initialization Function * @param None * @retval None */ static void MX_RTC_Init(void) { 80005a4: b580 push {r7, lr} 80005a6: b086 sub sp, #24 80005a8: af00 add r7, sp, #0 /* USER CODE BEGIN RTC_Init 0 */ /* USER CODE END RTC_Init 0 */ RTC_TimeTypeDef sTime = {0}; 80005aa: 1d3b adds r3, r7, #4 80005ac: 2200 movs r2, #0 80005ae: 601a str r2, [r3, #0] 80005b0: 605a str r2, [r3, #4] 80005b2: 609a str r2, [r3, #8] 80005b4: 60da str r2, [r3, #12] 80005b6: 611a str r2, [r3, #16] RTC_DateTypeDef sDate = {0}; 80005b8: 2300 movs r3, #0 80005ba: 603b str r3, [r7, #0] /* USER CODE END RTC_Init 1 */ /** Initialize RTC Only */ hrtc.Instance = RTC; 80005bc: 4b2b ldr r3, [pc, #172] @ (800066c ) 80005be: 4a2c ldr r2, [pc, #176] @ (8000670 ) 80005c0: 601a str r2, [r3, #0] hrtc.Init.HourFormat = RTC_HOURFORMAT_24; 80005c2: 4b2a ldr r3, [pc, #168] @ (800066c ) 80005c4: 2200 movs r2, #0 80005c6: 605a str r2, [r3, #4] hrtc.Init.AsynchPrediv = 127; 80005c8: 4b28 ldr r3, [pc, #160] @ (800066c ) 80005ca: 227f movs r2, #127 @ 0x7f 80005cc: 609a str r2, [r3, #8] hrtc.Init.SynchPrediv = 255; 80005ce: 4b27 ldr r3, [pc, #156] @ (800066c ) 80005d0: 22ff movs r2, #255 @ 0xff 80005d2: 60da str r2, [r3, #12] hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; 80005d4: 4b25 ldr r3, [pc, #148] @ (800066c ) 80005d6: 2200 movs r2, #0 80005d8: 611a str r2, [r3, #16] hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; 80005da: 4b24 ldr r3, [pc, #144] @ (800066c ) 80005dc: 2200 movs r2, #0 80005de: 619a str r2, [r3, #24] hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; 80005e0: 4b22 ldr r3, [pc, #136] @ (800066c ) 80005e2: 2200 movs r2, #0 80005e4: 61da str r2, [r3, #28] hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE; 80005e6: 4b21 ldr r3, [pc, #132] @ (800066c ) 80005e8: 2200 movs r2, #0 80005ea: 615a str r2, [r3, #20] if (HAL_RTC_Init(&hrtc) != HAL_OK) 80005ec: 481f ldr r0, [pc, #124] @ (800066c ) 80005ee: f003 f95b bl 80038a8 80005f2: 4603 mov r3, r0 80005f4: 2b00 cmp r3, #0 80005f6: d001 beq.n 80005fc { Error_Handler(); 80005f8: f000 f91e bl 8000838 /* USER CODE END Check_RTC_BKUP */ /** Initialize RTC and set the Time and Date */ sTime.Hours = 12; 80005fc: 230c movs r3, #12 80005fe: 713b strb r3, [r7, #4] sTime.Minutes = 50; 8000600: 2332 movs r3, #50 @ 0x32 8000602: 717b strb r3, [r7, #5] sTime.Seconds = 30; 8000604: 231e movs r3, #30 8000606: 71bb strb r3, [r7, #6] sTime.SubSeconds = 0x0; 8000608: 2300 movs r3, #0 800060a: 60bb str r3, [r7, #8] sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; 800060c: 2300 movs r3, #0 800060e: 613b str r3, [r7, #16] sTime.StoreOperation = RTC_STOREOPERATION_RESET; 8000610: 2300 movs r3, #0 8000612: 617b str r3, [r7, #20] if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK) 8000614: 1d3b adds r3, r7, #4 8000616: 2200 movs r2, #0 8000618: 4619 mov r1, r3 800061a: 4814 ldr r0, [pc, #80] @ (800066c ) 800061c: f003 f9cc bl 80039b8 8000620: 4603 mov r3, r0 8000622: 2b00 cmp r3, #0 8000624: d001 beq.n 800062a { Error_Handler(); 8000626: f000 f907 bl 8000838 } sDate.WeekDay = RTC_WEEKDAY_MONDAY; 800062a: 2301 movs r3, #1 800062c: 703b strb r3, [r7, #0] sDate.Month = RTC_MONTH_JANUARY; 800062e: 2301 movs r3, #1 8000630: 707b strb r3, [r7, #1] sDate.Date = 1; 8000632: 2301 movs r3, #1 8000634: 70bb strb r3, [r7, #2] sDate.Year = 0; 8000636: 2300 movs r3, #0 8000638: 70fb strb r3, [r7, #3] if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BIN) != HAL_OK) 800063a: 463b mov r3, r7 800063c: 2200 movs r2, #0 800063e: 4619 mov r1, r3 8000640: 480a ldr r0, [pc, #40] @ (800066c ) 8000642: f003 fab6 bl 8003bb2 8000646: 4603 mov r3, r0 8000648: 2b00 cmp r3, #0 800064a: d001 beq.n 8000650 { Error_Handler(); 800064c: f000 f8f4 bl 8000838 } /** Enable the WakeUp */ if (HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, 0, RTC_WAKEUPCLOCK_RTCCLK_DIV16) != HAL_OK) 8000650: 2200 movs r2, #0 8000652: 2100 movs r1, #0 8000654: 4805 ldr r0, [pc, #20] @ (800066c ) 8000656: f003 fc45 bl 8003ee4 800065a: 4603 mov r3, r0 800065c: 2b00 cmp r3, #0 800065e: d001 beq.n 8000664 { Error_Handler(); 8000660: f000 f8ea bl 8000838 } /* USER CODE BEGIN RTC_Init 2 */ /* USER CODE END RTC_Init 2 */ } 8000664: bf00 nop 8000666: 3718 adds r7, #24 8000668: 46bd mov sp, r7 800066a: bd80 pop {r7, pc} 800066c: 20000818 .word 0x20000818 8000670: 40002800 .word 0x40002800 08000674 : * @brief SPI1 Initialization Function * @param None * @retval None */ static void MX_SPI1_Init(void) { 8000674: b580 push {r7, lr} 8000676: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 parameter configuration*/ hspi1.Instance = SPI1; 8000678: 4b1b ldr r3, [pc, #108] @ (80006e8 ) 800067a: 4a1c ldr r2, [pc, #112] @ (80006ec ) 800067c: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; 800067e: 4b1a ldr r3, [pc, #104] @ (80006e8 ) 8000680: f44f 7282 mov.w r2, #260 @ 0x104 8000684: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; 8000686: 4b18 ldr r3, [pc, #96] @ (80006e8 ) 8000688: 2200 movs r2, #0 800068a: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 800068c: 4b16 ldr r3, [pc, #88] @ (80006e8 ) 800068e: f44f 62e0 mov.w r2, #1792 @ 0x700 8000692: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; 8000694: 4b14 ldr r3, [pc, #80] @ (80006e8 ) 8000696: 2200 movs r2, #0 8000698: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; 800069a: 4b13 ldr r3, [pc, #76] @ (80006e8 ) 800069c: 2200 movs r2, #0 800069e: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_SOFT; 80006a0: 4b11 ldr r3, [pc, #68] @ (80006e8 ) 80006a2: f44f 7200 mov.w r2, #512 @ 0x200 80006a6: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 80006a8: 4b0f ldr r3, [pc, #60] @ (80006e8 ) 80006aa: 2200 movs r2, #0 80006ac: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_LSB; 80006ae: 4b0e ldr r3, [pc, #56] @ (80006e8 ) 80006b0: 2280 movs r2, #128 @ 0x80 80006b2: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 80006b4: 4b0c ldr r3, [pc, #48] @ (80006e8 ) 80006b6: 2200 movs r2, #0 80006b8: 625a str r2, [r3, #36] @ 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 80006ba: 4b0b ldr r3, [pc, #44] @ (80006e8 ) 80006bc: 2200 movs r2, #0 80006be: 629a str r2, [r3, #40] @ 0x28 hspi1.Init.CRCPolynomial = 7; 80006c0: 4b09 ldr r3, [pc, #36] @ (80006e8 ) 80006c2: 2207 movs r2, #7 80006c4: 62da str r2, [r3, #44] @ 0x2c hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; 80006c6: 4b08 ldr r3, [pc, #32] @ (80006e8 ) 80006c8: 2200 movs r2, #0 80006ca: 631a str r2, [r3, #48] @ 0x30 hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE; 80006cc: 4b06 ldr r3, [pc, #24] @ (80006e8 ) 80006ce: 2200 movs r2, #0 80006d0: 635a str r2, [r3, #52] @ 0x34 if (HAL_SPI_Init(&hspi1) != HAL_OK) 80006d2: 4805 ldr r0, [pc, #20] @ (80006e8 ) 80006d4: f003 fd62 bl 800419c 80006d8: 4603 mov r3, r0 80006da: 2b00 cmp r3, #0 80006dc: d001 beq.n 80006e2 { Error_Handler(); 80006de: f000 f8ab bl 8000838 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } 80006e2: bf00 nop 80006e4: bd80 pop {r7, pc} 80006e6: bf00 nop 80006e8: 2000083c .word 0x2000083c 80006ec: 40013000 .word 0x40013000 080006f0 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 80006f0: b580 push {r7, lr} 80006f2: b086 sub sp, #24 80006f4: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80006f6: 1d3b adds r3, r7, #4 80006f8: 2200 movs r2, #0 80006fa: 601a str r2, [r3, #0] 80006fc: 605a str r2, [r3, #4] 80006fe: 609a str r2, [r3, #8] 8000700: 60da str r2, [r3, #12] 8000702: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8000704: 2004 movs r0, #4 8000706: f7ff fdef bl 80002e8 __HAL_RCC_GPIOA_CLK_ENABLE(); 800070a: 2001 movs r0, #1 800070c: f7ff fdec bl 80002e8 __HAL_RCC_GPIOB_CLK_ENABLE(); 8000710: 2002 movs r0, #2 8000712: f7ff fde9 bl 80002e8 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4|GPIO_PIN_6, GPIO_PIN_RESET); 8000716: 2200 movs r2, #0 8000718: 2150 movs r1, #80 @ 0x50 800071a: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 800071e: f001 f881 bl 8001824 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10, GPIO_PIN_SET); 8000722: 2201 movs r2, #1 8000724: f44f 6180 mov.w r1, #1024 @ 0x400 8000728: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 800072c: f001 f87a bl 8001824 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_SET); 8000730: 2201 movs r2, #1 8000732: 2130 movs r1, #48 @ 0x30 8000734: 4823 ldr r0, [pc, #140] @ (80007c4 ) 8000736: f001 f875 bl 8001824 /*Configure GPIO pin : PA0 */ GPIO_InitStruct.Pin = GPIO_PIN_0; 800073a: 2301 movs r3, #1 800073c: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 800073e: f44f 1388 mov.w r3, #1114112 @ 0x110000 8000742: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 8000744: 2302 movs r3, #2 8000746: 60fb str r3, [r7, #12] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000748: 1d3b adds r3, r7, #4 800074a: 4619 mov r1, r3 800074c: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8000750: f000 fef8 bl 8001544 /*Configure GPIO pins : PA4 PA6 PA10 */ GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_6|GPIO_PIN_10; 8000754: f44f 638a mov.w r3, #1104 @ 0x450 8000758: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800075a: 2301 movs r3, #1 800075c: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; 800075e: 2300 movs r3, #0 8000760: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000762: 2300 movs r3, #0 8000764: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000766: 1d3b adds r3, r7, #4 8000768: 4619 mov r1, r3 800076a: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 800076e: f000 fee9 bl 8001544 /*Configure GPIO pins : PA8 PA11 PA15 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_11|GPIO_PIN_15; 8000772: f44f 4309 mov.w r3, #35072 @ 0x8900 8000776: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8000778: 2300 movs r3, #0 800077a: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_PULLUP; 800077c: 2301 movs r3, #1 800077e: 60fb str r3, [r7, #12] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000780: 1d3b adds r3, r7, #4 8000782: 4619 mov r1, r3 8000784: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8000788: f000 fedc bl 8001544 /*Configure GPIO pin : PB0 */ GPIO_InitStruct.Pin = GPIO_PIN_0; 800078c: 2301 movs r3, #1 800078e: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8000790: 2300 movs r3, #0 8000792: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_PULLUP; 8000794: 2301 movs r3, #1 8000796: 60fb str r3, [r7, #12] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8000798: 1d3b adds r3, r7, #4 800079a: 4619 mov r1, r3 800079c: 4809 ldr r0, [pc, #36] @ (80007c4 ) 800079e: f000 fed1 bl 8001544 /*Configure GPIO pins : PB4 PB5 */ GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 80007a2: 2330 movs r3, #48 @ 0x30 80007a4: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; 80007a6: 2311 movs r3, #17 80007a8: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_PULLUP; 80007aa: 2301 movs r3, #1 80007ac: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80007ae: 2300 movs r3, #0 80007b0: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80007b2: 1d3b adds r3, r7, #4 80007b4: 4619 mov r1, r3 80007b6: 4803 ldr r0, [pc, #12] @ (80007c4 ) 80007b8: f000 fec4 bl 8001544 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 80007bc: bf00 nop 80007be: 3718 adds r7, #24 80007c0: 46bd mov sp, r7 80007c2: bd80 pop {r7, pc} 80007c4: 48000400 .word 0x48000400 080007c8 : /* USER CODE BEGIN 4 */ void SharpMem_Init() { 80007c8: b580 push {r7, lr} 80007ca: af00 add r7, sp, #0 lcd.width = 160; 80007cc: 4b18 ldr r3, [pc, #96] @ (8000830 ) 80007ce: 22a0 movs r2, #160 @ 0xa0 80007d0: 801a strh r2, [r3, #0] lcd.height = 68; 80007d2: 4b17 ldr r3, [pc, #92] @ (8000830 ) 80007d4: 2244 movs r2, #68 @ 0x44 80007d6: 805a strh r2, [r3, #2] lcd.spidev = &hspi1; 80007d8: 4b15 ldr r3, [pc, #84] @ (8000830 ) 80007da: 4a16 ldr r2, [pc, #88] @ (8000834 ) 80007dc: 615a str r2, [r3, #20] lcd.cs_pin_bank = GPIOA; 80007de: 4b14 ldr r3, [pc, #80] @ (8000830 ) 80007e0: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80007e4: 609a str r2, [r3, #8] lcd.cs_pin = GPIO_PIN_4; 80007e6: 4b12 ldr r3, [pc, #72] @ (8000830 ) 80007e8: 2210 movs r2, #16 80007ea: 809a strh r2, [r3, #4] lcd.lcdmode_pin_bank = GPIOA; 80007ec: 4b10 ldr r3, [pc, #64] @ (8000830 ) 80007ee: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80007f2: 611a str r2, [r3, #16] lcd.lcdmode_pin = GPIO_PIN_6; 80007f4: 4b0e ldr r3, [pc, #56] @ (8000830 ) 80007f6: 2240 movs r2, #64 @ 0x40 80007f8: 819a strh r2, [r3, #12] lcd._sharpmem_vcom = SHARPMEM_BIT_VCOM; 80007fa: 4b0d ldr r3, [pc, #52] @ (8000830 ) 80007fc: 2202 movs r2, #2 80007fe: 771a strb r2, [r3, #28] lcd._buffer = malloc(sizeof(uint8_t)*(lcd.width * lcd.height / 8)); 8000800: 4b0b ldr r3, [pc, #44] @ (8000830 ) 8000802: 881b ldrh r3, [r3, #0] 8000804: 461a mov r2, r3 8000806: 4b0a ldr r3, [pc, #40] @ (8000830 ) 8000808: 885b ldrh r3, [r3, #2] 800080a: fb02 f303 mul.w r3, r2, r3 800080e: 2b00 cmp r3, #0 8000810: da00 bge.n 8000814 8000812: 3307 adds r3, #7 8000814: 10db asrs r3, r3, #3 8000816: 4618 mov r0, r3 8000818: f004 f83e bl 8004898 800081c: 4603 mov r3, r0 800081e: 461a mov r2, r3 8000820: 4b03 ldr r3, [pc, #12] @ (8000830 ) 8000822: 619a str r2, [r3, #24] SHARPMEM_clear_display(&lcd); 8000824: 4802 ldr r0, [pc, #8] @ (8000830 ) 8000826: f000 f937 bl 8000a98 } 800082a: bf00 nop 800082c: bd80 pop {r7, pc} 800082e: bf00 nop 8000830: 20000750 .word 0x20000750 8000834: 2000083c .word 0x2000083c 08000838 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8000838: b480 push {r7} 800083a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800083c: b672 cpsid i } 800083e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8000840: bf00 nop 8000842: e7fd b.n 8000840 08000844 : #include "sharpmem.h" #include "fonts.h" void SHARPMEM_TOGGLEVCOM(SharpMemDisplay_t *display) { 8000844: b480 push {r7} 8000846: b083 sub sp, #12 8000848: af00 add r7, sp, #0 800084a: 6078 str r0, [r7, #4] display->_sharpmem_vcom = display->_sharpmem_vcom ? 0x00 : SHARPMEM_BIT_VCOM; 800084c: 687b ldr r3, [r7, #4] 800084e: 7f1b ldrb r3, [r3, #28] 8000850: 2b00 cmp r3, #0 8000852: d001 beq.n 8000858 8000854: 2200 movs r2, #0 8000856: e000 b.n 800085a 8000858: 2202 movs r2, #2 800085a: 687b ldr r3, [r7, #4] 800085c: 771a strb r2, [r3, #28] } 800085e: bf00 nop 8000860: 370c adds r7, #12 8000862: 46bd mov sp, r7 8000864: f85d 7b04 ldr.w r7, [sp], #4 8000868: 4770 bx lr 0800086a : void SHARPMEM_draw_pixel(SharpMemDisplay_t *display, uint16_t x, uint16_t y, bool black) { 800086a: b480 push {r7} 800086c: b085 sub sp, #20 800086e: af00 add r7, sp, #0 8000870: 60f8 str r0, [r7, #12] 8000872: 4608 mov r0, r1 8000874: 4611 mov r1, r2 8000876: 461a mov r2, r3 8000878: 4603 mov r3, r0 800087a: 817b strh r3, [r7, #10] 800087c: 460b mov r3, r1 800087e: 813b strh r3, [r7, #8] 8000880: 4613 mov r3, r2 8000882: 71fb strb r3, [r7, #7] if ((x >= display->width) || (y >= display->height)) 8000884: 68fb ldr r3, [r7, #12] 8000886: 881b ldrh r3, [r3, #0] 8000888: 897a ldrh r2, [r7, #10] 800088a: 429a cmp r2, r3 800088c: d24d bcs.n 800092a 800088e: 68fb ldr r3, [r7, #12] 8000890: 885b ldrh r3, [r3, #2] 8000892: 893a ldrh r2, [r7, #8] 8000894: 429a cmp r2, r3 8000896: d248 bcs.n 800092a return; if (black) { 8000898: 79fb ldrb r3, [r7, #7] 800089a: 2b00 cmp r3, #0 800089c: d021 beq.n 80008e2 display->_buffer[(y * display->width + x) / 8] |= (0x1 << (x & 7)); //potentially expensive when run many times, use lookup from adafruit lib 800089e: 68fb ldr r3, [r7, #12] 80008a0: 699a ldr r2, [r3, #24] 80008a2: 893b ldrh r3, [r7, #8] 80008a4: 68f9 ldr r1, [r7, #12] 80008a6: 8809 ldrh r1, [r1, #0] 80008a8: fb03 f101 mul.w r1, r3, r1 80008ac: 897b ldrh r3, [r7, #10] 80008ae: 440b add r3, r1 80008b0: 2b00 cmp r3, #0 80008b2: da00 bge.n 80008b6 80008b4: 3307 adds r3, #7 80008b6: 10db asrs r3, r3, #3 80008b8: 4618 mov r0, r3 80008ba: 4603 mov r3, r0 80008bc: 4413 add r3, r2 80008be: 781b ldrb r3, [r3, #0] 80008c0: b25a sxtb r2, r3 80008c2: 897b ldrh r3, [r7, #10] 80008c4: f003 0307 and.w r3, r3, #7 80008c8: 2101 movs r1, #1 80008ca: fa01 f303 lsl.w r3, r1, r3 80008ce: b25b sxtb r3, r3 80008d0: 4313 orrs r3, r2 80008d2: b25a sxtb r2, r3 80008d4: 68fb ldr r3, [r7, #12] 80008d6: 699b ldr r3, [r3, #24] 80008d8: 4601 mov r1, r0 80008da: 440b add r3, r1 80008dc: b2d2 uxtb r2, r2 80008de: 701a strb r2, [r3, #0] 80008e0: e024 b.n 800092c } else { display->_buffer[(y * display->width + x) / 8] &= ~(0x1 << (x & 7)); 80008e2: 68fb ldr r3, [r7, #12] 80008e4: 699a ldr r2, [r3, #24] 80008e6: 893b ldrh r3, [r7, #8] 80008e8: 68f9 ldr r1, [r7, #12] 80008ea: 8809 ldrh r1, [r1, #0] 80008ec: fb03 f101 mul.w r1, r3, r1 80008f0: 897b ldrh r3, [r7, #10] 80008f2: 440b add r3, r1 80008f4: 2b00 cmp r3, #0 80008f6: da00 bge.n 80008fa 80008f8: 3307 adds r3, #7 80008fa: 10db asrs r3, r3, #3 80008fc: 4618 mov r0, r3 80008fe: 4603 mov r3, r0 8000900: 4413 add r3, r2 8000902: 781b ldrb r3, [r3, #0] 8000904: b25a sxtb r2, r3 8000906: 897b ldrh r3, [r7, #10] 8000908: f003 0307 and.w r3, r3, #7 800090c: 2101 movs r1, #1 800090e: fa01 f303 lsl.w r3, r1, r3 8000912: b25b sxtb r3, r3 8000914: 43db mvns r3, r3 8000916: b25b sxtb r3, r3 8000918: 4013 ands r3, r2 800091a: b25a sxtb r2, r3 800091c: 68fb ldr r3, [r7, #12] 800091e: 699b ldr r3, [r3, #24] 8000920: 4601 mov r1, r0 8000922: 440b add r3, r1 8000924: b2d2 uxtb r2, r2 8000926: 701a strb r2, [r3, #0] 8000928: e000 b.n 800092c return; 800092a: bf00 nop } } 800092c: 3714 adds r7, #20 800092e: 46bd mov sp, r7 8000930: f85d 7b04 ldr.w r7, [sp], #4 8000934: 4770 bx lr ... 08000938 : void SHARPMEM_draw_rect(SharpMemDisplay_t *display, uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, bool filled) { } void SHARPMEM_write(SharpMemDisplay_t *display, char *text, uint8_t font_index, uint16_t x0, uint16_t y0, bool inverse, bool force_bg) { 8000938: b590 push {r4, r7, lr} 800093a: b089 sub sp, #36 @ 0x24 800093c: af00 add r7, sp, #0 800093e: 60f8 str r0, [r7, #12] 8000940: 60b9 str r1, [r7, #8] 8000942: 4611 mov r1, r2 8000944: 461a mov r2, r3 8000946: 460b mov r3, r1 8000948: 71fb strb r3, [r7, #7] 800094a: 4613 mov r3, r2 800094c: 80bb strh r3, [r7, #4] } } }*/ // potentially inefficient but simplest algorithm involving reading and writing every single pixel if(font_index > NUMBER_OF_FONTS) return; 800094e: 79fb ldrb r3, [r7, #7] 8000950: 2b01 cmp r3, #1 8000952: f200 809b bhi.w 8000a8c bitmap_font_t *font = fonts[font_index]; 8000956: 4b4f ldr r3, [pc, #316] @ (8000a94 ) 8000958: 681a ldr r2, [r3, #0] 800095a: 79fb ldrb r3, [r7, #7] 800095c: 009b lsls r3, r3, #2 800095e: 4413 add r3, r2 8000960: 681b ldr r3, [r3, #0] 8000962: 617b str r3, [r7, #20] for (uint8_t ci = 0; ci < strlen(text); ci++){ 8000964: 2300 movs r3, #0 8000966: 77fb strb r3, [r7, #31] 8000968: e087 b.n 8000a7a uint16_t base_index = font->lookup[(uint8_t)text[ci]]; 800096a: 697b ldr r3, [r7, #20] 800096c: 689b ldr r3, [r3, #8] 800096e: 7ffa ldrb r2, [r7, #31] 8000970: 68b9 ldr r1, [r7, #8] 8000972: 440a add r2, r1 8000974: 7812 ldrb r2, [r2, #0] 8000976: 4413 add r3, r2 8000978: 781b ldrb r3, [r3, #0] 800097a: 827b strh r3, [r7, #18] for (uint16_t y = 0; y < font->char_h; y++) { 800097c: 2300 movs r3, #0 800097e: 83bb strh r3, [r7, #28] 8000980: e072 b.n 8000a68 uint16_t charbase = base_index*font->bytes_per_char + y*font->bytes_per_row; 8000982: 697b ldr r3, [r7, #20] 8000984: 78db ldrb r3, [r3, #3] 8000986: 461a mov r2, r3 8000988: 8a7b ldrh r3, [r7, #18] 800098a: fb13 f302 smulbb r3, r3, r2 800098e: b29a uxth r2, r3 8000990: 697b ldr r3, [r7, #20] 8000992: 789b ldrb r3, [r3, #2] 8000994: 4619 mov r1, r3 8000996: 8bbb ldrh r3, [r7, #28] 8000998: fb13 f301 smulbb r3, r3, r1 800099c: b29b uxth r3, r3 800099e: 4413 add r3, r2 80009a0: 823b strh r3, [r7, #16] for (uint16_t x = 0; x < font->char_w; x++) { 80009a2: 2300 movs r3, #0 80009a4: 837b strh r3, [r7, #26] 80009a6: e056 b.n 8000a56 bool white = ( (font->font_bytes[charbase + x/8] & (0x1 << (x%8)) ) == 0 ); 80009a8: 697b ldr r3, [r7, #20] 80009aa: 685b ldr r3, [r3, #4] 80009ac: 8a3a ldrh r2, [r7, #16] 80009ae: 8b79 ldrh r1, [r7, #26] 80009b0: 08c9 lsrs r1, r1, #3 80009b2: b289 uxth r1, r1 80009b4: 440a add r2, r1 80009b6: 4413 add r3, r2 80009b8: 781b ldrb r3, [r3, #0] 80009ba: 461a mov r2, r3 80009bc: 8b7b ldrh r3, [r7, #26] 80009be: f003 0307 and.w r3, r3, #7 80009c2: fa42 f303 asr.w r3, r2, r3 80009c6: f003 0301 and.w r3, r3, #1 80009ca: 2b00 cmp r3, #0 80009cc: bf0c ite eq 80009ce: 2301 moveq r3, #1 80009d0: 2300 movne r3, #0 80009d2: 767b strb r3, [r7, #25] if (!force_bg && white) continue; 80009d4: f897 3038 ldrb.w r3, [r7, #56] @ 0x38 80009d8: f083 0301 eor.w r3, r3, #1 80009dc: b2db uxtb r3, r3 80009de: 2b00 cmp r3, #0 80009e0: d002 beq.n 80009e8 80009e2: 7e7b ldrb r3, [r7, #25] 80009e4: 2b00 cmp r3, #0 80009e6: d132 bne.n 8000a4e if (inverse) white = !white; 80009e8: f897 3034 ldrb.w r3, [r7, #52] @ 0x34 80009ec: 2b00 cmp r3, #0 80009ee: d00d beq.n 8000a0c 80009f0: 7e7b ldrb r3, [r7, #25] 80009f2: 2b00 cmp r3, #0 80009f4: bf14 ite ne 80009f6: 2301 movne r3, #1 80009f8: 2300 moveq r3, #0 80009fa: b2db uxtb r3, r3 80009fc: f083 0301 eor.w r3, r3, #1 8000a00: b2db uxtb r3, r3 8000a02: 767b strb r3, [r7, #25] 8000a04: 7e7b ldrb r3, [r7, #25] 8000a06: f003 0301 and.w r3, r3, #1 8000a0a: 767b strb r3, [r7, #25] SHARPMEM_draw_pixel(display, x0+ci*font->char_w+x, y0+y, !white); 8000a0c: 7ffb ldrb r3, [r7, #31] 8000a0e: b29b uxth r3, r3 8000a10: 697a ldr r2, [r7, #20] 8000a12: 7812 ldrb r2, [r2, #0] 8000a14: fb13 f302 smulbb r3, r3, r2 8000a18: b29a uxth r2, r3 8000a1a: 88bb ldrh r3, [r7, #4] 8000a1c: 4413 add r3, r2 8000a1e: b29a uxth r2, r3 8000a20: 8b7b ldrh r3, [r7, #26] 8000a22: 4413 add r3, r2 8000a24: b299 uxth r1, r3 8000a26: 8e3a ldrh r2, [r7, #48] @ 0x30 8000a28: 8bbb ldrh r3, [r7, #28] 8000a2a: 4413 add r3, r2 8000a2c: b29a uxth r2, r3 8000a2e: 7e7b ldrb r3, [r7, #25] 8000a30: 2b00 cmp r3, #0 8000a32: bf14 ite ne 8000a34: 2301 movne r3, #1 8000a36: 2300 moveq r3, #0 8000a38: b2db uxtb r3, r3 8000a3a: f083 0301 eor.w r3, r3, #1 8000a3e: b2db uxtb r3, r3 8000a40: f003 0301 and.w r3, r3, #1 8000a44: b2db uxtb r3, r3 8000a46: 68f8 ldr r0, [r7, #12] 8000a48: f7ff ff0f bl 800086a 8000a4c: e000 b.n 8000a50 if (!force_bg && white) continue; 8000a4e: bf00 nop for (uint16_t x = 0; x < font->char_w; x++) { 8000a50: 8b7b ldrh r3, [r7, #26] 8000a52: 3301 adds r3, #1 8000a54: 837b strh r3, [r7, #26] 8000a56: 697b ldr r3, [r7, #20] 8000a58: 781b ldrb r3, [r3, #0] 8000a5a: 461a mov r2, r3 8000a5c: 8b7b ldrh r3, [r7, #26] 8000a5e: 4293 cmp r3, r2 8000a60: d3a2 bcc.n 80009a8 for (uint16_t y = 0; y < font->char_h; y++) { 8000a62: 8bbb ldrh r3, [r7, #28] 8000a64: 3301 adds r3, #1 8000a66: 83bb strh r3, [r7, #28] 8000a68: 697b ldr r3, [r7, #20] 8000a6a: 785b ldrb r3, [r3, #1] 8000a6c: 461a mov r2, r3 8000a6e: 8bbb ldrh r3, [r7, #28] 8000a70: 4293 cmp r3, r2 8000a72: d386 bcc.n 8000982 for (uint8_t ci = 0; ci < strlen(text); ci++){ 8000a74: 7ffb ldrb r3, [r7, #31] 8000a76: 3301 adds r3, #1 8000a78: 77fb strb r3, [r7, #31] 8000a7a: 7ffc ldrb r4, [r7, #31] 8000a7c: 68b8 ldr r0, [r7, #8] 8000a7e: f7ff fb7f bl 8000180 8000a82: 4603 mov r3, r0 8000a84: 429c cmp r4, r3 8000a86: f4ff af70 bcc.w 800096a 8000a8a: e000 b.n 8000a8e if(font_index > NUMBER_OF_FONTS) return; 8000a8c: bf00 nop } } } } 8000a8e: 3724 adds r7, #36 @ 0x24 8000a90: 46bd mov sp, r7 8000a92: bd90 pop {r4, r7, pc} 8000a94: 20000740 .word 0x20000740 08000a98 : if ((x >= display->width) || (y >= display->height)) return 1; //1 = empty } void SHARPMEM_clear_display(SharpMemDisplay_t *display) { 8000a98: b580 push {r7, lr} 8000a9a: b084 sub sp, #16 8000a9c: af00 add r7, sp, #0 8000a9e: 6078 str r0, [r7, #4] HAL_GPIO_WritePin(display->lcdmode_pin_bank, display->lcdmode_pin, GPIO_PIN_RESET); // set lcdmode pin to low for manual vcom control 8000aa0: 687b ldr r3, [r7, #4] 8000aa2: 6918 ldr r0, [r3, #16] 8000aa4: 687b ldr r3, [r7, #4] 8000aa6: 899b ldrh r3, [r3, #12] 8000aa8: 2200 movs r2, #0 8000aaa: 4619 mov r1, r3 8000aac: f000 feba bl 8001824 memset(display->_buffer, 0xff, (display->width * display->height) / 8); 8000ab0: 687b ldr r3, [r7, #4] 8000ab2: 6998 ldr r0, [r3, #24] 8000ab4: 687b ldr r3, [r7, #4] 8000ab6: 881b ldrh r3, [r3, #0] 8000ab8: 461a mov r2, r3 8000aba: 687b ldr r3, [r7, #4] 8000abc: 885b ldrh r3, [r3, #2] 8000abe: fb02 f303 mul.w r3, r2, r3 8000ac2: 2b00 cmp r3, #0 8000ac4: da00 bge.n 8000ac8 8000ac6: 3307 adds r3, #7 8000ac8: 10db asrs r3, r3, #3 8000aca: 461a mov r2, r3 8000acc: 21ff movs r1, #255 @ 0xff 8000ace: f003 ffbb bl 8004a48 // Send the clear screen command rather than doing a HW refresh (quicker) uint8_t clear_data[2] = {(uint8_t)(display->_sharpmem_vcom | SHARPMEM_BIT_CLEAR), 8000ad2: 687b ldr r3, [r7, #4] 8000ad4: 7f1b ldrb r3, [r3, #28] 8000ad6: f043 0304 orr.w r3, r3, #4 8000ada: b2db uxtb r3, r3 8000adc: 733b strb r3, [r7, #12] 8000ade: 2300 movs r3, #0 8000ae0: 737b strb r3, [r7, #13] 0x00}; HAL_GPIO_WritePin(display->cs_pin_bank, display->cs_pin, GPIO_PIN_SET); 8000ae2: 687b ldr r3, [r7, #4] 8000ae4: 6898 ldr r0, [r3, #8] 8000ae6: 687b ldr r3, [r7, #4] 8000ae8: 889b ldrh r3, [r3, #4] 8000aea: 2201 movs r2, #1 8000aec: 4619 mov r1, r3 8000aee: f000 fe99 bl 8001824 HAL_SPI_Transmit(display->spidev, clear_data, 2, 16); 8000af2: 687b ldr r3, [r7, #4] 8000af4: 6958 ldr r0, [r3, #20] 8000af6: f107 010c add.w r1, r7, #12 8000afa: 2310 movs r3, #16 8000afc: 2202 movs r2, #2 8000afe: f003 fbf0 bl 80042e2 HAL_GPIO_WritePin(display->cs_pin_bank, display->cs_pin, GPIO_PIN_RESET); 8000b02: 687b ldr r3, [r7, #4] 8000b04: 6898 ldr r0, [r3, #8] 8000b06: 687b ldr r3, [r7, #4] 8000b08: 889b ldrh r3, [r3, #4] 8000b0a: 2200 movs r2, #0 8000b0c: 4619 mov r1, r3 8000b0e: f000 fe89 bl 8001824 SHARPMEM_TOGGLEVCOM(display); 8000b12: 6878 ldr r0, [r7, #4] 8000b14: f7ff fe96 bl 8000844 HAL_GPIO_WritePin(display->lcdmode_pin_bank, display->lcdmode_pin, GPIO_PIN_SET); // set lcdmode pin to high for 1Hz external vcom signal 8000b18: 687b ldr r3, [r7, #4] 8000b1a: 6918 ldr r0, [r3, #16] 8000b1c: 687b ldr r3, [r7, #4] 8000b1e: 899b ldrh r3, [r3, #12] 8000b20: 2201 movs r2, #1 8000b22: 4619 mov r1, r3 8000b24: f000 fe7e bl 8001824 } 8000b28: bf00 nop 8000b2a: 3710 adds r7, #16 8000b2c: 46bd mov sp, r7 8000b2e: bd80 pop {r7, pc} 08000b30 : void SHARPMEM_refresh_display(SharpMemDisplay_t *display) { 8000b30: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8000b34: b089 sub sp, #36 @ 0x24 8000b36: af00 add r7, sp, #0 8000b38: 6078 str r0, [r7, #4] HAL_GPIO_WritePin(display->lcdmode_pin_bank, display->lcdmode_pin, GPIO_PIN_RESET); // set lcdmode pin to low for manual vcom control 8000b3a: 687b ldr r3, [r7, #4] 8000b3c: 6918 ldr r0, [r3, #16] 8000b3e: 687b ldr r3, [r7, #4] 8000b40: 899b ldrh r3, [r3, #12] 8000b42: 2200 movs r2, #0 8000b44: 4619 mov r1, r3 8000b46: f000 fe6d bl 8001824 uint16_t i, currentline; //spidev->beginTransaction(); // Send the write command HAL_GPIO_WritePin(display->cs_pin_bank, display->cs_pin, GPIO_PIN_SET); 8000b4a: 687b ldr r3, [r7, #4] 8000b4c: 6898 ldr r0, [r3, #8] 8000b4e: 687b ldr r3, [r7, #4] 8000b50: 889b ldrh r3, [r3, #4] 8000b52: 2201 movs r2, #1 8000b54: 4619 mov r1, r3 8000b56: f000 fe65 bl 8001824 uint8_t write_data[1] = {0x00 | SHARPMEM_BIT_WRITECMD}; 8000b5a: 2301 movs r3, #1 8000b5c: 733b strb r3, [r7, #12] HAL_SPI_Transmit(display->spidev, write_data, 1, 100); 8000b5e: 687b ldr r3, [r7, #4] 8000b60: 6958 ldr r0, [r3, #20] 8000b62: f107 010c add.w r1, r7, #12 8000b66: 2364 movs r3, #100 @ 0x64 8000b68: 2201 movs r2, #1 8000b6a: f003 fbba bl 80042e2 SHARPMEM_TOGGLEVCOM(display); 8000b6e: 6878 ldr r0, [r7, #4] 8000b70: f7ff fe68 bl 8000844 uint8_t bytes_per_line = display->width / 8; 8000b74: 687b ldr r3, [r7, #4] 8000b76: 881b ldrh r3, [r3, #0] 8000b78: 08db lsrs r3, r3, #3 8000b7a: b29b uxth r3, r3 8000b7c: 777b strb r3, [r7, #29] uint16_t totalbytes = (display->width * display->height) / 8; 8000b7e: 687b ldr r3, [r7, #4] 8000b80: 881b ldrh r3, [r3, #0] 8000b82: 461a mov r2, r3 8000b84: 687b ldr r3, [r7, #4] 8000b86: 885b ldrh r3, [r3, #2] 8000b88: fb02 f303 mul.w r3, r2, r3 8000b8c: 2b00 cmp r3, #0 8000b8e: da00 bge.n 8000b92 8000b90: 3307 adds r3, #7 8000b92: 10db asrs r3, r3, #3 8000b94: 837b strh r3, [r7, #26] for (i = 0; i < totalbytes; i += bytes_per_line) { 8000b96: 2300 movs r3, #0 8000b98: 83fb strh r3, [r7, #30] 8000b9a: e056 b.n 8000c4a 8000b9c: 466b mov r3, sp 8000b9e: 461e mov r6, r3 uint8_t line[bytes_per_line + 2]; 8000ba0: 7f7b ldrb r3, [r7, #29] 8000ba2: 1c99 adds r1, r3, #2 8000ba4: 1e4b subs r3, r1, #1 8000ba6: 617b str r3, [r7, #20] 8000ba8: 460a mov r2, r1 8000baa: 2300 movs r3, #0 8000bac: 4614 mov r4, r2 8000bae: 461d mov r5, r3 8000bb0: f04f 0200 mov.w r2, #0 8000bb4: f04f 0300 mov.w r3, #0 8000bb8: 00eb lsls r3, r5, #3 8000bba: ea43 7354 orr.w r3, r3, r4, lsr #29 8000bbe: 00e2 lsls r2, r4, #3 8000bc0: 460a mov r2, r1 8000bc2: 2300 movs r3, #0 8000bc4: 4690 mov r8, r2 8000bc6: 4699 mov r9, r3 8000bc8: f04f 0200 mov.w r2, #0 8000bcc: f04f 0300 mov.w r3, #0 8000bd0: ea4f 03c9 mov.w r3, r9, lsl #3 8000bd4: ea43 7358 orr.w r3, r3, r8, lsr #29 8000bd8: ea4f 02c8 mov.w r2, r8, lsl #3 8000bdc: 460b mov r3, r1 8000bde: 3307 adds r3, #7 8000be0: 08db lsrs r3, r3, #3 8000be2: 00db lsls r3, r3, #3 8000be4: ebad 0d03 sub.w sp, sp, r3 8000be8: 466b mov r3, sp 8000bea: 3300 adds r3, #0 8000bec: 613b str r3, [r7, #16] // Send address byte currentline = ((i + 1) / (display->width / 8)) + 1; 8000bee: 8bfb ldrh r3, [r7, #30] 8000bf0: 3301 adds r3, #1 8000bf2: 687a ldr r2, [r7, #4] 8000bf4: 8812 ldrh r2, [r2, #0] 8000bf6: 08d2 lsrs r2, r2, #3 8000bf8: b292 uxth r2, r2 8000bfa: fb93 f3f2 sdiv r3, r3, r2 8000bfe: b29b uxth r3, r3 8000c00: 3301 adds r3, #1 8000c02: 81fb strh r3, [r7, #14] line[0] = currentline; 8000c04: 89fb ldrh r3, [r7, #14] 8000c06: b2da uxtb r2, r3 8000c08: 693b ldr r3, [r7, #16] 8000c0a: 701a strb r2, [r3, #0] // copy over this line memcpy(line + 1, display->_buffer + i, bytes_per_line); 8000c0c: 693b ldr r3, [r7, #16] 8000c0e: 1c58 adds r0, r3, #1 8000c10: 687b ldr r3, [r7, #4] 8000c12: 699a ldr r2, [r3, #24] 8000c14: 8bfb ldrh r3, [r7, #30] 8000c16: 4413 add r3, r2 8000c18: 7f7a ldrb r2, [r7, #29] 8000c1a: 4619 mov r1, r3 8000c1c: f003 ff58 bl 8004ad0 // Send end of line line[bytes_per_line + 1] = 0x00; 8000c20: 7f7b ldrb r3, [r7, #29] 8000c22: 3301 adds r3, #1 8000c24: 693a ldr r2, [r7, #16] 8000c26: 2100 movs r1, #0 8000c28: 54d1 strb r1, [r2, r3] // send it! HAL_SPI_Transmit(display->spidev, line, bytes_per_line + 2, 16); 8000c2a: 687b ldr r3, [r7, #4] 8000c2c: 6958 ldr r0, [r3, #20] 8000c2e: 7f7b ldrb r3, [r7, #29] 8000c30: b29b uxth r3, r3 8000c32: 3302 adds r3, #2 8000c34: b29a uxth r2, r3 8000c36: 2310 movs r3, #16 8000c38: 6939 ldr r1, [r7, #16] 8000c3a: f003 fb52 bl 80042e2 8000c3e: 46b5 mov sp, r6 for (i = 0; i < totalbytes; i += bytes_per_line) { 8000c40: 7f7b ldrb r3, [r7, #29] 8000c42: b29a uxth r2, r3 8000c44: 8bfb ldrh r3, [r7, #30] 8000c46: 4413 add r3, r2 8000c48: 83fb strh r3, [r7, #30] 8000c4a: 8bfa ldrh r2, [r7, #30] 8000c4c: 8b7b ldrh r3, [r7, #26] 8000c4e: 429a cmp r2, r3 8000c50: d3a4 bcc.n 8000b9c } // Send another trailing 8 bits for the last line HAL_SPI_Transmit(display->spidev, (0x00), 1, 100); 8000c52: 687b ldr r3, [r7, #4] 8000c54: 6958 ldr r0, [r3, #20] 8000c56: 2364 movs r3, #100 @ 0x64 8000c58: 2201 movs r2, #1 8000c5a: 2100 movs r1, #0 8000c5c: f003 fb41 bl 80042e2 HAL_GPIO_WritePin(display->cs_pin_bank, display->cs_pin, GPIO_PIN_RESET); 8000c60: 687b ldr r3, [r7, #4] 8000c62: 6898 ldr r0, [r3, #8] 8000c64: 687b ldr r3, [r7, #4] 8000c66: 889b ldrh r3, [r3, #4] 8000c68: 2200 movs r2, #0 8000c6a: 4619 mov r1, r3 8000c6c: f000 fdda bl 8001824 HAL_GPIO_WritePin(display->lcdmode_pin_bank, display->lcdmode_pin, GPIO_PIN_SET); // set lcdmode pin to high for 1Hz external vcom signal 8000c70: 687b ldr r3, [r7, #4] 8000c72: 6918 ldr r0, [r3, #16] 8000c74: 687b ldr r3, [r7, #4] 8000c76: 899b ldrh r3, [r3, #12] 8000c78: 2201 movs r2, #1 8000c7a: 4619 mov r1, r3 8000c7c: f000 fdd2 bl 8001824 } 8000c80: bf00 nop 8000c82: 3724 adds r7, #36 @ 0x24 8000c84: 46bd mov sp, r7 8000c86: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 08000c8a : void SHARPMEM_clear_display_buffer(SharpMemDisplay_t *display) { 8000c8a: b580 push {r7, lr} 8000c8c: b082 sub sp, #8 8000c8e: af00 add r7, sp, #0 8000c90: 6078 str r0, [r7, #4] memset(display->_buffer, 0xff, (display->width * display->height) / 8); 8000c92: 687b ldr r3, [r7, #4] 8000c94: 6998 ldr r0, [r3, #24] 8000c96: 687b ldr r3, [r7, #4] 8000c98: 881b ldrh r3, [r3, #0] 8000c9a: 461a mov r2, r3 8000c9c: 687b ldr r3, [r7, #4] 8000c9e: 885b ldrh r3, [r3, #2] 8000ca0: fb02 f303 mul.w r3, r2, r3 8000ca4: 2b00 cmp r3, #0 8000ca6: da00 bge.n 8000caa 8000ca8: 3307 adds r3, #7 8000caa: 10db asrs r3, r3, #3 8000cac: 461a mov r2, r3 8000cae: 21ff movs r1, #255 @ 0xff 8000cb0: f003 feca bl 8004a48 } 8000cb4: bf00 nop 8000cb6: 3708 adds r7, #8 8000cb8: 46bd mov sp, r7 8000cba: bd80 pop {r7, pc} 08000cbc : * @brief Enable RTC * @rmtoll BDCR RTCEN LL_RCC_EnableRTC * @retval None */ __STATIC_INLINE void LL_RCC_EnableRTC(void) { 8000cbc: b480 push {r7} 8000cbe: af00 add r7, sp, #0 SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN); 8000cc0: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000cc4: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8000cc8: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000 8000ccc: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8000cd0: f8c2 3090 str.w r3, [r2, #144] @ 0x90 } 8000cd4: bf00 nop 8000cd6: 46bd mov sp, r7 8000cd8: f85d 7b04 ldr.w r7, [sp], #4 8000cdc: 4770 bx lr 08000cde : { 8000cde: b480 push {r7} 8000ce0: b085 sub sp, #20 8000ce2: af00 add r7, sp, #0 8000ce4: 6078 str r0, [r7, #4] SET_BIT(RCC->AHB2ENR, Periphs); 8000ce6: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000cea: 6cda ldr r2, [r3, #76] @ 0x4c 8000cec: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000 8000cf0: 687b ldr r3, [r7, #4] 8000cf2: 4313 orrs r3, r2 8000cf4: 64cb str r3, [r1, #76] @ 0x4c tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); 8000cf6: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000cfa: 6cda ldr r2, [r3, #76] @ 0x4c 8000cfc: 687b ldr r3, [r7, #4] 8000cfe: 4013 ands r3, r2 8000d00: 60fb str r3, [r7, #12] (void)tmpreg; 8000d02: 68fb ldr r3, [r7, #12] } 8000d04: bf00 nop 8000d06: 3714 adds r7, #20 8000d08: 46bd mov sp, r7 8000d0a: f85d 7b04 ldr.w r7, [sp], #4 8000d0e: 4770 bx lr 08000d10 : * @arg @ref LL_AHB3_GRP1_PERIPH_FLASH * @note (*) Not supported by all the devices * @retval None */ __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs) { 8000d10: b480 push {r7} 8000d12: b085 sub sp, #20 8000d14: af00 add r7, sp, #0 8000d16: 6078 str r0, [r7, #4] __IO uint32_t tmpreg; SET_BIT(RCC->AHB3ENR, Periphs); 8000d18: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000d1c: 6d1a ldr r2, [r3, #80] @ 0x50 8000d1e: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000 8000d22: 687b ldr r3, [r7, #4] 8000d24: 4313 orrs r3, r2 8000d26: 650b str r3, [r1, #80] @ 0x50 /* Delay after an RCC peripheral clock enabling */ tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); 8000d28: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000d2c: 6d1a ldr r2, [r3, #80] @ 0x50 8000d2e: 687b ldr r3, [r7, #4] 8000d30: 4013 ands r3, r2 8000d32: 60fb str r3, [r7, #12] (void)tmpreg; 8000d34: 68fb ldr r3, [r7, #12] } 8000d36: bf00 nop 8000d38: 3714 adds r7, #20 8000d3a: 46bd mov sp, r7 8000d3c: f85d 7b04 ldr.w r7, [sp], #4 8000d40: 4770 bx lr 08000d42 : * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 * @note (*) Not supported by all the devices * @retval None */ __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) { 8000d42: b480 push {r7} 8000d44: b085 sub sp, #20 8000d46: af00 add r7, sp, #0 8000d48: 6078 str r0, [r7, #4] __IO uint32_t tmpreg; SET_BIT(RCC->APB1ENR1, Periphs); 8000d4a: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000d4e: 6d9a ldr r2, [r3, #88] @ 0x58 8000d50: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000 8000d54: 687b ldr r3, [r7, #4] 8000d56: 4313 orrs r3, r2 8000d58: 658b str r3, [r1, #88] @ 0x58 /* Delay after an RCC peripheral clock enabling */ tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); 8000d5a: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000d5e: 6d9a ldr r2, [r3, #88] @ 0x58 8000d60: 687b ldr r3, [r7, #4] 8000d62: 4013 ands r3, r2 8000d64: 60fb str r3, [r7, #12] (void)tmpreg; 8000d66: 68fb ldr r3, [r7, #12] } 8000d68: bf00 nop 8000d6a: 3714 adds r7, #20 8000d6c: 46bd mov sp, r7 8000d6e: f85d 7b04 ldr.w r7, [sp], #4 8000d72: 4770 bx lr 08000d74 : * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) * @note (*) Not supported by all the devices * @retval None */ __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) { 8000d74: b480 push {r7} 8000d76: b085 sub sp, #20 8000d78: af00 add r7, sp, #0 8000d7a: 6078 str r0, [r7, #4] __IO uint32_t tmpreg; SET_BIT(RCC->APB2ENR, Periphs); 8000d7c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000d80: 6e1a ldr r2, [r3, #96] @ 0x60 8000d82: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000 8000d86: 687b ldr r3, [r7, #4] 8000d88: 4313 orrs r3, r2 8000d8a: 660b str r3, [r1, #96] @ 0x60 /* Delay after an RCC peripheral clock enabling */ tmpreg = READ_BIT(RCC->APB2ENR, Periphs); 8000d8c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8000d90: 6e1a ldr r2, [r3, #96] @ 0x60 8000d92: 687b ldr r3, [r7, #4] 8000d94: 4013 ands r3, r2 8000d96: 60fb str r3, [r7, #12] (void)tmpreg; 8000d98: 68fb ldr r3, [r7, #12] } 8000d9a: bf00 nop 8000d9c: 3714 adds r7, #20 8000d9e: 46bd mov sp, r7 8000da0: f85d 7b04 ldr.w r7, [sp], #4 8000da4: 4770 bx lr 08000da6 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8000da6: b580 push {r7, lr} 8000da8: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_HSEM_CLK_ENABLE(); 8000daa: f44f 2000 mov.w r0, #524288 @ 0x80000 8000dae: f7ff ffaf bl 8000d10 /* System interrupt init*/ /* Peripheral interrupt init */ /* HSEM_IRQn interrupt configuration */ HAL_NVIC_SetPriority(HSEM_IRQn, 0, 0); 8000db2: 2200 movs r2, #0 8000db4: 2100 movs r1, #0 8000db6: 202e movs r0, #46 @ 0x2e 8000db8: f000 fb8f bl 80014da HAL_NVIC_EnableIRQ(HSEM_IRQn); 8000dbc: 202e movs r0, #46 @ 0x2e 8000dbe: f000 fba6 bl 800150e /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8000dc2: bf00 nop 8000dc4: bd80 pop {r7, pc} ... 08000dc8 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8000dc8: b580 push {r7, lr} 8000dca: b09c sub sp, #112 @ 0x70 8000dcc: af00 add r7, sp, #0 8000dce: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000dd0: f107 035c add.w r3, r7, #92 @ 0x5c 8000dd4: 2200 movs r2, #0 8000dd6: 601a str r2, [r3, #0] 8000dd8: 605a str r2, [r3, #4] 8000dda: 609a str r2, [r3, #8] 8000ddc: 60da str r2, [r3, #12] 8000dde: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 8000de0: f107 030c add.w r3, r7, #12 8000de4: 2250 movs r2, #80 @ 0x50 8000de6: 2100 movs r1, #0 8000de8: 4618 mov r0, r3 8000dea: f003 fe2d bl 8004a48 if(hi2c->Instance==I2C1) 8000dee: 687b ldr r3, [r7, #4] 8000df0: 681b ldr r3, [r3, #0] 8000df2: 4a16 ldr r2, [pc, #88] @ (8000e4c ) 8000df4: 4293 cmp r3, r2 8000df6: d125 bne.n 8000e44 /* USER CODE END I2C1_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2C1; 8000df8: 2304 movs r3, #4 8000dfa: 60fb str r3, [r7, #12] PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; 8000dfc: f44f 3340 mov.w r3, #196608 @ 0x30000 8000e00: 62fb str r3, [r7, #44] @ 0x2c if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8000e02: f107 030c add.w r3, r7, #12 8000e06: 4618 mov r0, r3 8000e08: f002 fac7 bl 800339a 8000e0c: 4603 mov r3, r0 8000e0e: 2b00 cmp r3, #0 8000e10: d001 beq.n 8000e16 { Error_Handler(); 8000e12: f7ff fd11 bl 8000838 } __HAL_RCC_GPIOB_CLK_ENABLE(); 8000e16: 2002 movs r0, #2 8000e18: f7ff ff61 bl 8000cde /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8000e1c: 23c0 movs r3, #192 @ 0xc0 8000e1e: 65fb str r3, [r7, #92] @ 0x5c GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8000e20: 2312 movs r3, #18 8000e22: 663b str r3, [r7, #96] @ 0x60 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000e24: 2300 movs r3, #0 8000e26: 667b str r3, [r7, #100] @ 0x64 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000e28: 2300 movs r3, #0 8000e2a: 66bb str r3, [r7, #104] @ 0x68 GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 8000e2c: 2304 movs r3, #4 8000e2e: 66fb str r3, [r7, #108] @ 0x6c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8000e30: f107 035c add.w r3, r7, #92 @ 0x5c 8000e34: 4619 mov r1, r3 8000e36: 4806 ldr r0, [pc, #24] @ (8000e50 ) 8000e38: f000 fb84 bl 8001544 /* Peripheral clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); 8000e3c: f44f 1000 mov.w r0, #2097152 @ 0x200000 8000e40: f7ff ff7f bl 8000d42 /* USER CODE END I2C1_MspInit 1 */ } } 8000e44: bf00 nop 8000e46: 3770 adds r7, #112 @ 0x70 8000e48: 46bd mov sp, r7 8000e4a: bd80 pop {r7, pc} 8000e4c: 40005400 .word 0x40005400 8000e50: 48000400 .word 0x48000400 08000e54 : * This function configures the hardware resources used in this example * @param hipcc: IPCC handle pointer * @retval None */ void HAL_IPCC_MspInit(IPCC_HandleTypeDef* hipcc) { 8000e54: b580 push {r7, lr} 8000e56: b082 sub sp, #8 8000e58: af00 add r7, sp, #0 8000e5a: 6078 str r0, [r7, #4] if(hipcc->Instance==IPCC) 8000e5c: 687b ldr r3, [r7, #4] 8000e5e: 681b ldr r3, [r3, #0] 8000e60: 4a0d ldr r2, [pc, #52] @ (8000e98 ) 8000e62: 4293 cmp r3, r2 8000e64: d113 bne.n 8000e8e { /* USER CODE BEGIN IPCC_MspInit 0 */ /* USER CODE END IPCC_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_IPCC_CLK_ENABLE(); 8000e66: f44f 1080 mov.w r0, #1048576 @ 0x100000 8000e6a: f7ff ff51 bl 8000d10 /* IPCC interrupt Init */ HAL_NVIC_SetPriority(IPCC_C1_RX_IRQn, 0, 0); 8000e6e: 2200 movs r2, #0 8000e70: 2100 movs r1, #0 8000e72: 202c movs r0, #44 @ 0x2c 8000e74: f000 fb31 bl 80014da HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn); 8000e78: 202c movs r0, #44 @ 0x2c 8000e7a: f000 fb48 bl 800150e HAL_NVIC_SetPriority(IPCC_C1_TX_IRQn, 0, 0); 8000e7e: 2200 movs r2, #0 8000e80: 2100 movs r1, #0 8000e82: 202d movs r0, #45 @ 0x2d 8000e84: f000 fb29 bl 80014da HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn); 8000e88: 202d movs r0, #45 @ 0x2d 8000e8a: f000 fb40 bl 800150e /* USER CODE END IPCC_MspInit 1 */ } } 8000e8e: bf00 nop 8000e90: 3708 adds r7, #8 8000e92: 46bd mov sp, r7 8000e94: bd80 pop {r7, pc} 8000e96: bf00 nop 8000e98: 58000c00 .word 0x58000c00 08000e9c : * This function configures the hardware resources used in this example * @param hrtc: RTC handle pointer * @retval None */ void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) { 8000e9c: b580 push {r7, lr} 8000e9e: b096 sub sp, #88 @ 0x58 8000ea0: af00 add r7, sp, #0 8000ea2: 6078 str r0, [r7, #4] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 8000ea4: f107 0308 add.w r3, r7, #8 8000ea8: 2250 movs r2, #80 @ 0x50 8000eaa: 2100 movs r1, #0 8000eac: 4618 mov r0, r3 8000eae: f003 fdcb bl 8004a48 if(hrtc->Instance==RTC) 8000eb2: 687b ldr r3, [r7, #4] 8000eb4: 681b ldr r3, [r3, #0] 8000eb6: 4a12 ldr r2, [pc, #72] @ (8000f00 ) 8000eb8: 4293 cmp r3, r2 8000eba: d11d bne.n 8000ef8 /* USER CODE END RTC_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; 8000ebc: f44f 6300 mov.w r3, #2048 @ 0x800 8000ec0: 60bb str r3, [r7, #8] PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 8000ec2: f44f 7380 mov.w r3, #256 @ 0x100 8000ec6: 64bb str r3, [r7, #72] @ 0x48 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8000ec8: f107 0308 add.w r3, r7, #8 8000ecc: 4618 mov r0, r3 8000ece: f002 fa64 bl 800339a 8000ed2: 4603 mov r3, r0 8000ed4: 2b00 cmp r3, #0 8000ed6: d001 beq.n 8000edc { Error_Handler(); 8000ed8: f7ff fcae bl 8000838 } /* Peripheral clock enable */ __HAL_RCC_RTC_ENABLE(); 8000edc: f7ff feee bl 8000cbc __HAL_RCC_RTCAPB_CLK_ENABLE(); 8000ee0: f44f 6080 mov.w r0, #1024 @ 0x400 8000ee4: f7ff ff2d bl 8000d42 /* RTC interrupt Init */ HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 0, 0); 8000ee8: 2200 movs r2, #0 8000eea: 2100 movs r1, #0 8000eec: 2003 movs r0, #3 8000eee: f000 faf4 bl 80014da HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn); 8000ef2: 2003 movs r0, #3 8000ef4: f000 fb0b bl 800150e /* USER CODE END RTC_MspInit 1 */ } } 8000ef8: bf00 nop 8000efa: 3758 adds r7, #88 @ 0x58 8000efc: 46bd mov sp, r7 8000efe: bd80 pop {r7, pc} 8000f00: 40002800 .word 0x40002800 08000f04 : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { 8000f04: b580 push {r7, lr} 8000f06: b088 sub sp, #32 8000f08: af00 add r7, sp, #0 8000f0a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000f0c: f107 030c add.w r3, r7, #12 8000f10: 2200 movs r2, #0 8000f12: 601a str r2, [r3, #0] 8000f14: 605a str r2, [r3, #4] 8000f16: 609a str r2, [r3, #8] 8000f18: 60da str r2, [r3, #12] 8000f1a: 611a str r2, [r3, #16] if(hspi->Instance==SPI1) 8000f1c: 687b ldr r3, [r7, #4] 8000f1e: 681b ldr r3, [r3, #0] 8000f20: 4a0f ldr r2, [pc, #60] @ (8000f60 ) 8000f22: 4293 cmp r3, r2 8000f24: d117 bne.n 8000f56 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); 8000f26: f44f 5080 mov.w r0, #4096 @ 0x1000 8000f2a: f7ff ff23 bl 8000d74 __HAL_RCC_GPIOA_CLK_ENABLE(); 8000f2e: 2001 movs r0, #1 8000f30: f7ff fed5 bl 8000cde /**SPI1 GPIO Configuration PA5 ------> SPI1_SCK PA7 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7; 8000f34: 23a0 movs r3, #160 @ 0xa0 8000f36: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000f38: 2302 movs r3, #2 8000f3a: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000f3c: 2300 movs r3, #0 8000f3e: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000f40: 2300 movs r3, #0 8000f42: 61bb str r3, [r7, #24] GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 8000f44: 2305 movs r3, #5 8000f46: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000f48: f107 030c add.w r3, r7, #12 8000f4c: 4619 mov r1, r3 8000f4e: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8000f52: f000 faf7 bl 8001544 /* USER CODE END SPI1_MspInit 1 */ } } 8000f56: bf00 nop 8000f58: 3720 adds r7, #32 8000f5a: 46bd mov sp, r7 8000f5c: bd80 pop {r7, pc} 8000f5e: bf00 nop 8000f60: 40013000 .word 0x40013000 08000f64 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8000f64: b480 push {r7} 8000f66: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8000f68: bf00 nop 8000f6a: e7fd b.n 8000f68 08000f6c : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8000f6c: b480 push {r7} 8000f6e: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8000f70: bf00 nop 8000f72: e7fd b.n 8000f70 08000f74 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8000f74: b480 push {r7} 8000f76: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8000f78: bf00 nop 8000f7a: e7fd b.n 8000f78 08000f7c : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8000f7c: b480 push {r7} 8000f7e: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8000f80: bf00 nop 8000f82: e7fd b.n 8000f80 08000f84 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8000f84: b480 push {r7} 8000f86: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8000f88: bf00 nop 8000f8a: e7fd b.n 8000f88 08000f8c : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8000f8c: b480 push {r7} 8000f8e: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8000f90: bf00 nop 8000f92: 46bd mov sp, r7 8000f94: f85d 7b04 ldr.w r7, [sp], #4 8000f98: 4770 bx lr 08000f9a : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8000f9a: b480 push {r7} 8000f9c: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8000f9e: bf00 nop 8000fa0: 46bd mov sp, r7 8000fa2: f85d 7b04 ldr.w r7, [sp], #4 8000fa6: 4770 bx lr 08000fa8 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8000fa8: b480 push {r7} 8000faa: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8000fac: bf00 nop 8000fae: 46bd mov sp, r7 8000fb0: f85d 7b04 ldr.w r7, [sp], #4 8000fb4: 4770 bx lr 08000fb6 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8000fb6: b580 push {r7, lr} 8000fb8: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8000fba: f000 f943 bl 8001244 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8000fbe: bf00 nop 8000fc0: bd80 pop {r7, pc} ... 08000fc4 : /** * @brief This function handles RTC wake-up interrupt through EXTI line 19. */ void RTC_WKUP_IRQHandler(void) { 8000fc4: b580 push {r7, lr} 8000fc6: af00 add r7, sp, #0 /* USER CODE BEGIN RTC_WKUP_IRQn 0 */ /* USER CODE END RTC_WKUP_IRQn 0 */ HAL_RTCEx_WakeUpTimerIRQHandler(&hrtc); 8000fc8: 4802 ldr r0, [pc, #8] @ (8000fd4 ) 8000fca: f003 f8b7 bl 800413c /* USER CODE BEGIN RTC_WKUP_IRQn 1 */ /* USER CODE END RTC_WKUP_IRQn 1 */ } 8000fce: bf00 nop 8000fd0: bd80 pop {r7, pc} 8000fd2: bf00 nop 8000fd4: 20000818 .word 0x20000818 08000fd8 : /** * @brief This function handles IPCC RX occupied interrupt. */ void IPCC_C1_RX_IRQHandler(void) { 8000fd8: b580 push {r7, lr} 8000fda: af00 add r7, sp, #0 /* USER CODE BEGIN IPCC_C1_RX_IRQn 0 */ /* USER CODE END IPCC_C1_RX_IRQn 0 */ HAL_IPCC_RX_IRQHandler(&hipcc); 8000fdc: 4802 ldr r0, [pc, #8] @ (8000fe8 ) 8000fde: f000 fe0f bl 8001c00 /* USER CODE BEGIN IPCC_C1_RX_IRQn 1 */ /* USER CODE END IPCC_C1_RX_IRQn 1 */ } 8000fe2: bf00 nop 8000fe4: bd80 pop {r7, pc} 8000fe6: bf00 nop 8000fe8: 200007dc .word 0x200007dc 08000fec : /** * @brief This function handles IPCC TX free interrupt. */ void IPCC_C1_TX_IRQHandler(void) { 8000fec: b580 push {r7, lr} 8000fee: af00 add r7, sp, #0 /* USER CODE BEGIN IPCC_C1_TX_IRQn 0 */ /* USER CODE END IPCC_C1_TX_IRQn 0 */ HAL_IPCC_TX_IRQHandler(&hipcc); 8000ff0: 4802 ldr r0, [pc, #8] @ (8000ffc ) 8000ff2: f000 fdb7 bl 8001b64 /* USER CODE BEGIN IPCC_C1_TX_IRQn 1 */ /* USER CODE END IPCC_C1_TX_IRQn 1 */ } 8000ff6: bf00 nop 8000ff8: bd80 pop {r7, pc} 8000ffa: bf00 nop 8000ffc: 200007dc .word 0x200007dc 08001000 : /** * @brief This function handles HSEM global interrupt. */ void HSEM_IRQHandler(void) { 8001000: b580 push {r7, lr} 8001002: af00 add r7, sp, #0 /* USER CODE BEGIN HSEM_IRQn 0 */ /* USER CODE END HSEM_IRQn 0 */ HAL_HSEM_IRQHandler(); 8001004: f000 fc26 bl 8001854 /* USER CODE BEGIN HSEM_IRQn 1 */ /* USER CODE END HSEM_IRQn 1 */ } 8001008: bf00 nop 800100a: bd80 pop {r7, pc} 0800100c <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 800100c: b580 push {r7, lr} 800100e: b086 sub sp, #24 8001010: af00 add r7, sp, #0 8001012: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8001014: 4a14 ldr r2, [pc, #80] @ (8001068 <_sbrk+0x5c>) 8001016: 4b15 ldr r3, [pc, #84] @ (800106c <_sbrk+0x60>) 8001018: 1ad3 subs r3, r2, r3 800101a: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 800101c: 697b ldr r3, [r7, #20] 800101e: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8001020: 4b13 ldr r3, [pc, #76] @ (8001070 <_sbrk+0x64>) 8001022: 681b ldr r3, [r3, #0] 8001024: 2b00 cmp r3, #0 8001026: d102 bne.n 800102e <_sbrk+0x22> { __sbrk_heap_end = &_end; 8001028: 4b11 ldr r3, [pc, #68] @ (8001070 <_sbrk+0x64>) 800102a: 4a12 ldr r2, [pc, #72] @ (8001074 <_sbrk+0x68>) 800102c: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 800102e: 4b10 ldr r3, [pc, #64] @ (8001070 <_sbrk+0x64>) 8001030: 681a ldr r2, [r3, #0] 8001032: 687b ldr r3, [r7, #4] 8001034: 4413 add r3, r2 8001036: 693a ldr r2, [r7, #16] 8001038: 429a cmp r2, r3 800103a: d207 bcs.n 800104c <_sbrk+0x40> { errno = ENOMEM; 800103c: f003 fd1c bl 8004a78 <__errno> 8001040: 4603 mov r3, r0 8001042: 220c movs r2, #12 8001044: 601a str r2, [r3, #0] return (void *)-1; 8001046: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800104a: e009 b.n 8001060 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 800104c: 4b08 ldr r3, [pc, #32] @ (8001070 <_sbrk+0x64>) 800104e: 681b ldr r3, [r3, #0] 8001050: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8001052: 4b07 ldr r3, [pc, #28] @ (8001070 <_sbrk+0x64>) 8001054: 681a ldr r2, [r3, #0] 8001056: 687b ldr r3, [r7, #4] 8001058: 4413 add r3, r2 800105a: 4a05 ldr r2, [pc, #20] @ (8001070 <_sbrk+0x64>) 800105c: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 800105e: 68fb ldr r3, [r7, #12] } 8001060: 4618 mov r0, r3 8001062: 3718 adds r7, #24 8001064: 46bd mov sp, r7 8001066: bd80 pop {r7, pc} 8001068: 20030000 .word 0x20030000 800106c: 00000400 .word 0x00000400 8001070: 200008a0 .word 0x200008a0 8001074: 200009f0 .word 0x200009f0 08001078 : * @brief Setup the microcontroller system. * @param None * @retval None */ void SystemInit(void) { 8001078: b480 push {r7} 800107a: af00 add r7, sp, #0 SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; #endif /* USER_VECT_TAB_ADDRESS */ /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << (10UL * 2UL)) | (3UL << (11UL * 2UL))); /* set CP10 and CP11 Full Access */ 800107c: 4b24 ldr r3, [pc, #144] @ (8001110 ) 800107e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8001082: 4a23 ldr r2, [pc, #140] @ (8001110 ) 8001084: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 8001088: f8c2 3088 str.w r3, [r2, #136] @ 0x88 #endif /* FPU */ /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set MSION bit */ RCC->CR |= RCC_CR_MSION; 800108c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8001090: 681b ldr r3, [r3, #0] 8001092: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000 8001096: f043 0301 orr.w r3, r3, #1 800109a: 6013 str r3, [r2, #0] /* Reset CFGR register */ RCC->CFGR = 0x00070000U; 800109c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 80010a0: f44f 22e0 mov.w r2, #458752 @ 0x70000 80010a4: 609a str r2, [r3, #8] /* Reset PLLSAI1ON, PLLON, HSECSSON, HSEON, HSION, and MSIPLLON bits */ RCC->CR &= (uint32_t)0xFAF6FEFBU; 80010a6: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 80010aa: 681a ldr r2, [r3, #0] 80010ac: f04f 41b0 mov.w r1, #1476395008 @ 0x58000000 80010b0: 4b18 ldr r3, [pc, #96] @ (8001114 ) 80010b2: 4013 ands r3, r2 80010b4: 600b str r3, [r1, #0] /*!< Reset LSI1 and LSI2 bits */ RCC->CSR &= (uint32_t)0xFFFFFFFAU; 80010b6: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 80010ba: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 80010be: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000 80010c2: f023 0305 bic.w r3, r3, #5 80010c6: f8c2 3094 str.w r3, [r2, #148] @ 0x94 /*!< Reset HSI48ON bit */ RCC->CRRCR &= (uint32_t)0xFFFFFFFEU; 80010ca: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 80010ce: f8d3 3098 ldr.w r3, [r3, #152] @ 0x98 80010d2: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000 80010d6: f023 0301 bic.w r3, r3, #1 80010da: f8c2 3098 str.w r3, [r2, #152] @ 0x98 /* Reset PLLCFGR register */ RCC->PLLCFGR = 0x22041000U; 80010de: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 80010e2: 4a0d ldr r2, [pc, #52] @ (8001118 ) 80010e4: 60da str r2, [r3, #12] #if defined(STM32WB55xx) || defined(STM32WB5Mxx) /* Reset PLLSAI1CFGR register */ RCC->PLLSAI1CFGR = 0x22041000U; 80010e6: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 80010ea: 4a0b ldr r2, [pc, #44] @ (8001118 ) 80010ec: 611a str r2, [r3, #16] #endif /* STM32WB55xx || STM32WB5Mxx */ /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 80010ee: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 80010f2: 681b ldr r3, [r3, #0] 80010f4: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000 80010f8: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80010fc: 6013 str r3, [r2, #0] /* Disable all interrupts */ RCC->CIER = 0x00000000; 80010fe: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000 8001102: 2200 movs r2, #0 8001104: 619a str r2, [r3, #24] } 8001106: bf00 nop 8001108: 46bd mov sp, r7 800110a: f85d 7b04 ldr.w r7, [sp], #4 800110e: 4770 bx lr 8001110: e000ed00 .word 0xe000ed00 8001114: faf6fefb .word 0xfaf6fefb 8001118: 22041000 .word 0x22041000 0800111c : bl LoopCopyDataInit .endm .section .text.data_initializers CopyDataInit: ldr r4, [r2, r3] 800111c: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800111e: 50c4 str r4, [r0, r3] adds r3, r3, #4 8001120: 3304 adds r3, #4 08001122 : LoopCopyDataInit: adds r4, r0, r3 8001122: 18c4 adds r4, r0, r3 cmp r4, r1 8001124: 428c cmp r4, r1 bcc CopyDataInit 8001126: d3f9 bcc.n 800111c bx lr 8001128: 4770 bx lr 0800112a : FillZerobss: str r3, [r0] 800112a: 6003 str r3, [r0, #0] adds r0, r0, #4 800112c: 3004 adds r0, #4 0800112e : LoopFillZerobss: cmp r0, r1 800112e: 4288 cmp r0, r1 bcc FillZerobss 8001130: d3fb bcc.n 800112a bx lr 8001132: 4770 bx lr 08001134 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack 8001134: 480c ldr r0, [pc, #48] @ (8001168 ) mov sp, r0 /* set stack pointer */ 8001136: 4685 mov sp, r0 /* Call the clock system initialization function.*/ bl SystemInit 8001138: f7ff ff9e bl 8001078 /* Copy the data segment initializers from flash to SRAM */ INIT_DATA _sdata, _edata, _sidata 800113c: 480b ldr r0, [pc, #44] @ (800116c ) 800113e: 490c ldr r1, [pc, #48] @ (8001170 ) 8001140: 4a0c ldr r2, [pc, #48] @ (8001174 ) 8001142: 2300 movs r3, #0 8001144: f7ff ffed bl 8001122 INIT_DATA _sMB_MEM2, _eMB_MEM2, _siMB_MEM2 8001148: 480b ldr r0, [pc, #44] @ (8001178 ) 800114a: 490c ldr r1, [pc, #48] @ (800117c ) 800114c: 4a0c ldr r2, [pc, #48] @ (8001180 ) 800114e: 2300 movs r3, #0 8001150: f7ff ffe7 bl 8001122 /* Zero fill the bss segments. */ INIT_BSS _sbss, _ebss 8001154: 480b ldr r0, [pc, #44] @ (8001184 ) 8001156: 490c ldr r1, [pc, #48] @ (8001188 ) 8001158: 2300 movs r3, #0 800115a: f7ff ffe8 bl 800112e /* Call static constructors */ bl __libc_init_array 800115e: f003 fc91 bl 8004a84 <__libc_init_array> /* Call the application s entry point.*/ bl main 8001162: f7ff f8db bl 800031c

08001166 : LoopForever: b LoopForever 8001166: e7fe b.n 8001166 ldr r0, =_estack 8001168: 20030000 .word 0x20030000 INIT_DATA _sdata, _edata, _sidata 800116c: 20000008 .word 0x20000008 8001170: 20000724 .word 0x20000724 8001174: 080052fc .word 0x080052fc INIT_DATA _sMB_MEM2, _eMB_MEM2, _siMB_MEM2 8001178: 20030000 .word 0x20030000 800117c: 20030000 .word 0x20030000 8001180: 08005a18 .word 0x08005a18 INIT_BSS _sbss, _ebss 8001184: 20000724 .word 0x20000724 8001188: 200009f0 .word 0x200009f0 0800118c : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800118c: e7fe b.n 800118c ... 08001190 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001190: b580 push {r7, lr} 8001192: b082 sub sp, #8 8001194: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 8001196: 2300 movs r3, #0 8001198: 71fb strb r3, [r7, #7] #if (DATA_CACHE_ENABLE == 0U) __HAL_FLASH_DATA_CACHE_DISABLE(); #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800119a: 4b0c ldr r3, [pc, #48] @ (80011cc ) 800119c: 681b ldr r3, [r3, #0] 800119e: 4a0b ldr r2, [pc, #44] @ (80011cc ) 80011a0: f443 7380 orr.w r3, r3, #256 @ 0x100 80011a4: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80011a6: 2003 movs r0, #3 80011a8: f000 f98c bl 80014c4 /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) 80011ac: 200f movs r0, #15 80011ae: f000 f80f bl 80011d0 80011b2: 4603 mov r3, r0 80011b4: 2b00 cmp r3, #0 80011b6: d002 beq.n 80011be { status = HAL_ERROR; 80011b8: 2301 movs r3, #1 80011ba: 71fb strb r3, [r7, #7] 80011bc: e001 b.n 80011c2 } else { /* Init the low level hardware */ HAL_MspInit(); 80011be: f7ff fdf2 bl 8000da6 } /* Return function status */ return status; 80011c2: 79fb ldrb r3, [r7, #7] } 80011c4: 4618 mov r0, r3 80011c6: 3708 adds r7, #8 80011c8: 46bd mov sp, r7 80011ca: bd80 pop {r7, pc} 80011cc: 58004000 .word 0x58004000 080011d0 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 80011d0: b580 push {r7, lr} 80011d2: b084 sub sp, #16 80011d4: af00 add r7, sp, #0 80011d6: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80011d8: 2300 movs r3, #0 80011da: 73fb strb r3, [r7, #15] if ((uint32_t)uwTickFreq != 0U) 80011dc: 4b17 ldr r3, [pc, #92] @ (800123c ) 80011de: 781b ldrb r3, [r3, #0] 80011e0: 2b00 cmp r3, #0 80011e2: d024 beq.n 800122e { /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / (1000U / (uint32_t)uwTickFreq)) == 0U) 80011e4: f001 fe74 bl 8002ed0 80011e8: 4602 mov r2, r0 80011ea: 4b14 ldr r3, [pc, #80] @ (800123c ) 80011ec: 781b ldrb r3, [r3, #0] 80011ee: 4619 mov r1, r3 80011f0: f44f 737a mov.w r3, #1000 @ 0x3e8 80011f4: fbb3 f3f1 udiv r3, r3, r1 80011f8: fbb2 f3f3 udiv r3, r2, r3 80011fc: 4618 mov r0, r3 80011fe: f000 f994 bl 800152a 8001202: 4603 mov r3, r0 8001204: 2b00 cmp r3, #0 8001206: d10f bne.n 8001228 { /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8001208: 687b ldr r3, [r7, #4] 800120a: 2b0f cmp r3, #15 800120c: d809 bhi.n 8001222 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 800120e: 2200 movs r2, #0 8001210: 6879 ldr r1, [r7, #4] 8001212: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8001216: f000 f960 bl 80014da uwTickPrio = TickPriority; 800121a: 4a09 ldr r2, [pc, #36] @ (8001240 ) 800121c: 687b ldr r3, [r7, #4] 800121e: 6013 str r3, [r2, #0] 8001220: e007 b.n 8001232 } else { status = HAL_ERROR; 8001222: 2301 movs r3, #1 8001224: 73fb strb r3, [r7, #15] 8001226: e004 b.n 8001232 } } else { status = HAL_ERROR; 8001228: 2301 movs r3, #1 800122a: 73fb strb r3, [r7, #15] 800122c: e001 b.n 8001232 } } else { status = HAL_ERROR; 800122e: 2301 movs r3, #1 8001230: 73fb strb r3, [r7, #15] } /* Return function status */ return status; 8001232: 7bfb ldrb r3, [r7, #15] } 8001234: 4618 mov r0, r3 8001236: 3710 adds r7, #16 8001238: 46bd mov sp, r7 800123a: bd80 pop {r7, pc} 800123c: 200006d0 .word 0x200006d0 8001240: 200006cc .word 0x200006cc 08001244 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001244: b480 push {r7} 8001246: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; 8001248: 4b06 ldr r3, [pc, #24] @ (8001264 ) 800124a: 781b ldrb r3, [r3, #0] 800124c: 461a mov r2, r3 800124e: 4b06 ldr r3, [pc, #24] @ (8001268 ) 8001250: 681b ldr r3, [r3, #0] 8001252: 4413 add r3, r2 8001254: 4a04 ldr r2, [pc, #16] @ (8001268 ) 8001256: 6013 str r3, [r2, #0] } 8001258: bf00 nop 800125a: 46bd mov sp, r7 800125c: f85d 7b04 ldr.w r7, [sp], #4 8001260: 4770 bx lr 8001262: bf00 nop 8001264: 200006d0 .word 0x200006d0 8001268: 200008a4 .word 0x200008a4 0800126c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 800126c: b480 push {r7} 800126e: af00 add r7, sp, #0 return uwTick; 8001270: 4b03 ldr r3, [pc, #12] @ (8001280 ) 8001272: 681b ldr r3, [r3, #0] } 8001274: 4618 mov r0, r3 8001276: 46bd mov sp, r7 8001278: f85d 7b04 ldr.w r7, [sp], #4 800127c: 4770 bx lr 800127e: bf00 nop 8001280: 200008a4 .word 0x200008a4 08001284 : /** * @brief This function returns a tick priority. * @retval tick priority */ uint32_t HAL_GetTickPrio(void) { 8001284: b480 push {r7} 8001286: af00 add r7, sp, #0 return uwTickPrio; 8001288: 4b03 ldr r3, [pc, #12] @ (8001298 ) 800128a: 681b ldr r3, [r3, #0] } 800128c: 4618 mov r0, r3 800128e: 46bd mov sp, r7 8001290: f85d 7b04 ldr.w r7, [sp], #4 8001294: 4770 bx lr 8001296: bf00 nop 8001298: 200006cc .word 0x200006cc 0800129c : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 800129c: b580 push {r7, lr} 800129e: b084 sub sp, #16 80012a0: af00 add r7, sp, #0 80012a2: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 80012a4: f7ff ffe2 bl 800126c 80012a8: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 80012aa: 687b ldr r3, [r7, #4] 80012ac: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80012ae: 68fb ldr r3, [r7, #12] 80012b0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80012b4: d005 beq.n 80012c2 { wait += (uint32_t)(uwTickFreq); 80012b6: 4b0a ldr r3, [pc, #40] @ (80012e0 ) 80012b8: 781b ldrb r3, [r3, #0] 80012ba: 461a mov r2, r3 80012bc: 68fb ldr r3, [r7, #12] 80012be: 4413 add r3, r2 80012c0: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 80012c2: bf00 nop 80012c4: f7ff ffd2 bl 800126c 80012c8: 4602 mov r2, r0 80012ca: 68bb ldr r3, [r7, #8] 80012cc: 1ad3 subs r3, r2, r3 80012ce: 68fa ldr r2, [r7, #12] 80012d0: 429a cmp r2, r3 80012d2: d8f7 bhi.n 80012c4 { } } 80012d4: bf00 nop 80012d6: bf00 nop 80012d8: 3710 adds r7, #16 80012da: 46bd mov sp, r7 80012dc: bd80 pop {r7, pc} 80012de: bf00 nop 80012e0: 200006d0 .word 0x200006d0 080012e4 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_SuspendTick(void) { 80012e4: b480 push {r7} 80012e6: af00 add r7, sp, #0 /* Disable SysTick Interrupt */ CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); 80012e8: 4b05 ldr r3, [pc, #20] @ (8001300 ) 80012ea: 681b ldr r3, [r3, #0] 80012ec: 4a04 ldr r2, [pc, #16] @ (8001300 ) 80012ee: f023 0302 bic.w r3, r3, #2 80012f2: 6013 str r3, [r2, #0] } 80012f4: bf00 nop 80012f6: 46bd mov sp, r7 80012f8: f85d 7b04 ldr.w r7, [sp], #4 80012fc: 4770 bx lr 80012fe: bf00 nop 8001300: e000e010 .word 0xe000e010 08001304 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_ResumeTick(void) { 8001304: b480 push {r7} 8001306: af00 add r7, sp, #0 /* Enable SysTick Interrupt */ SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); 8001308: 4b05 ldr r3, [pc, #20] @ (8001320 ) 800130a: 681b ldr r3, [r3, #0] 800130c: 4a04 ldr r2, [pc, #16] @ (8001320 ) 800130e: f043 0302 orr.w r3, r3, #2 8001312: 6013 str r3, [r2, #0] } 8001314: bf00 nop 8001316: 46bd mov sp, r7 8001318: f85d 7b04 ldr.w r7, [sp], #4 800131c: 4770 bx lr 800131e: bf00 nop 8001320: e000e010 .word 0xe000e010 08001324 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001324: b480 push {r7} 8001326: b085 sub sp, #20 8001328: af00 add r7, sp, #0 800132a: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 800132c: 687b ldr r3, [r7, #4] 800132e: f003 0307 and.w r3, r3, #7 8001332: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8001334: 4b0c ldr r3, [pc, #48] @ (8001368 <__NVIC_SetPriorityGrouping+0x44>) 8001336: 68db ldr r3, [r3, #12] 8001338: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 800133a: 68ba ldr r2, [r7, #8] 800133c: f64f 03ff movw r3, #63743 @ 0xf8ff 8001340: 4013 ands r3, r2 8001342: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8001344: 68fb ldr r3, [r7, #12] 8001346: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8001348: 68bb ldr r3, [r7, #8] 800134a: 4313 orrs r3, r2 reg_value = (reg_value | 800134c: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8001350: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8001354: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8001356: 4a04 ldr r2, [pc, #16] @ (8001368 <__NVIC_SetPriorityGrouping+0x44>) 8001358: 68bb ldr r3, [r7, #8] 800135a: 60d3 str r3, [r2, #12] } 800135c: bf00 nop 800135e: 3714 adds r7, #20 8001360: 46bd mov sp, r7 8001362: f85d 7b04 ldr.w r7, [sp], #4 8001366: 4770 bx lr 8001368: e000ed00 .word 0xe000ed00 0800136c <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 800136c: b480 push {r7} 800136e: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001370: 4b04 ldr r3, [pc, #16] @ (8001384 <__NVIC_GetPriorityGrouping+0x18>) 8001372: 68db ldr r3, [r3, #12] 8001374: 0a1b lsrs r3, r3, #8 8001376: f003 0307 and.w r3, r3, #7 } 800137a: 4618 mov r0, r3 800137c: 46bd mov sp, r7 800137e: f85d 7b04 ldr.w r7, [sp], #4 8001382: 4770 bx lr 8001384: e000ed00 .word 0xe000ed00 08001388 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8001388: b480 push {r7} 800138a: b083 sub sp, #12 800138c: af00 add r7, sp, #0 800138e: 4603 mov r3, r0 8001390: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001392: f997 3007 ldrsb.w r3, [r7, #7] 8001396: 2b00 cmp r3, #0 8001398: db0b blt.n 80013b2 <__NVIC_EnableIRQ+0x2a> { __COMPILER_BARRIER(); NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 800139a: 79fb ldrb r3, [r7, #7] 800139c: f003 021f and.w r2, r3, #31 80013a0: 4907 ldr r1, [pc, #28] @ (80013c0 <__NVIC_EnableIRQ+0x38>) 80013a2: f997 3007 ldrsb.w r3, [r7, #7] 80013a6: 095b lsrs r3, r3, #5 80013a8: 2001 movs r0, #1 80013aa: fa00 f202 lsl.w r2, r0, r2 80013ae: f841 2023 str.w r2, [r1, r3, lsl #2] __COMPILER_BARRIER(); } } 80013b2: bf00 nop 80013b4: 370c adds r7, #12 80013b6: 46bd mov sp, r7 80013b8: f85d 7b04 ldr.w r7, [sp], #4 80013bc: 4770 bx lr 80013be: bf00 nop 80013c0: e000e100 .word 0xe000e100 080013c4 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 80013c4: b480 push {r7} 80013c6: b083 sub sp, #12 80013c8: af00 add r7, sp, #0 80013ca: 4603 mov r3, r0 80013cc: 6039 str r1, [r7, #0] 80013ce: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 80013d0: f997 3007 ldrsb.w r3, [r7, #7] 80013d4: 2b00 cmp r3, #0 80013d6: db0a blt.n 80013ee <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80013d8: 683b ldr r3, [r7, #0] 80013da: b2da uxtb r2, r3 80013dc: 490c ldr r1, [pc, #48] @ (8001410 <__NVIC_SetPriority+0x4c>) 80013de: f997 3007 ldrsb.w r3, [r7, #7] 80013e2: 0112 lsls r2, r2, #4 80013e4: b2d2 uxtb r2, r2 80013e6: 440b add r3, r1 80013e8: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 80013ec: e00a b.n 8001404 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80013ee: 683b ldr r3, [r7, #0] 80013f0: b2da uxtb r2, r3 80013f2: 4908 ldr r1, [pc, #32] @ (8001414 <__NVIC_SetPriority+0x50>) 80013f4: 79fb ldrb r3, [r7, #7] 80013f6: f003 030f and.w r3, r3, #15 80013fa: 3b04 subs r3, #4 80013fc: 0112 lsls r2, r2, #4 80013fe: b2d2 uxtb r2, r2 8001400: 440b add r3, r1 8001402: 761a strb r2, [r3, #24] } 8001404: bf00 nop 8001406: 370c adds r7, #12 8001408: 46bd mov sp, r7 800140a: f85d 7b04 ldr.w r7, [sp], #4 800140e: 4770 bx lr 8001410: e000e100 .word 0xe000e100 8001414: e000ed00 .word 0xe000ed00 08001418 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8001418: b480 push {r7} 800141a: b089 sub sp, #36 @ 0x24 800141c: af00 add r7, sp, #0 800141e: 60f8 str r0, [r7, #12] 8001420: 60b9 str r1, [r7, #8] 8001422: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001424: 68fb ldr r3, [r7, #12] 8001426: f003 0307 and.w r3, r3, #7 800142a: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800142c: 69fb ldr r3, [r7, #28] 800142e: f1c3 0307 rsb r3, r3, #7 8001432: 2b04 cmp r3, #4 8001434: bf28 it cs 8001436: 2304 movcs r3, #4 8001438: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800143a: 69fb ldr r3, [r7, #28] 800143c: 3304 adds r3, #4 800143e: 2b06 cmp r3, #6 8001440: d902 bls.n 8001448 8001442: 69fb ldr r3, [r7, #28] 8001444: 3b03 subs r3, #3 8001446: e000 b.n 800144a 8001448: 2300 movs r3, #0 800144a: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800144c: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8001450: 69bb ldr r3, [r7, #24] 8001452: fa02 f303 lsl.w r3, r2, r3 8001456: 43da mvns r2, r3 8001458: 68bb ldr r3, [r7, #8] 800145a: 401a ands r2, r3 800145c: 697b ldr r3, [r7, #20] 800145e: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8001460: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 8001464: 697b ldr r3, [r7, #20] 8001466: fa01 f303 lsl.w r3, r1, r3 800146a: 43d9 mvns r1, r3 800146c: 687b ldr r3, [r7, #4] 800146e: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001470: 4313 orrs r3, r2 ); } 8001472: 4618 mov r0, r3 8001474: 3724 adds r7, #36 @ 0x24 8001476: 46bd mov sp, r7 8001478: f85d 7b04 ldr.w r7, [sp], #4 800147c: 4770 bx lr ... 08001480 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8001480: b580 push {r7, lr} 8001482: b082 sub sp, #8 8001484: af00 add r7, sp, #0 8001486: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8001488: 687b ldr r3, [r7, #4] 800148a: 3b01 subs r3, #1 800148c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8001490: d301 bcc.n 8001496 { return (1UL); /* Reload value impossible */ 8001492: 2301 movs r3, #1 8001494: e00f b.n 80014b6 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8001496: 4a0a ldr r2, [pc, #40] @ (80014c0 ) 8001498: 687b ldr r3, [r7, #4] 800149a: 3b01 subs r3, #1 800149c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 800149e: 210f movs r1, #15 80014a0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80014a4: f7ff ff8e bl 80013c4 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80014a8: 4b05 ldr r3, [pc, #20] @ (80014c0 ) 80014aa: 2200 movs r2, #0 80014ac: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80014ae: 4b04 ldr r3, [pc, #16] @ (80014c0 ) 80014b0: 2207 movs r2, #7 80014b2: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 80014b4: 2300 movs r3, #0 } 80014b6: 4618 mov r0, r3 80014b8: 3708 adds r7, #8 80014ba: 46bd mov sp, r7 80014bc: bd80 pop {r7, pc} 80014be: bf00 nop 80014c0: e000e010 .word 0xe000e010 080014c4 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80014c4: b580 push {r7, lr} 80014c6: b082 sub sp, #8 80014c8: af00 add r7, sp, #0 80014ca: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 80014cc: 6878 ldr r0, [r7, #4] 80014ce: f7ff ff29 bl 8001324 <__NVIC_SetPriorityGrouping> } 80014d2: bf00 nop 80014d4: 3708 adds r7, #8 80014d6: 46bd mov sp, r7 80014d8: bd80 pop {r7, pc} 080014da : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 80014da: b580 push {r7, lr} 80014dc: b086 sub sp, #24 80014de: af00 add r7, sp, #0 80014e0: 4603 mov r3, r0 80014e2: 60b9 str r1, [r7, #8] 80014e4: 607a str r2, [r7, #4] 80014e6: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 80014e8: f7ff ff40 bl 800136c <__NVIC_GetPriorityGrouping> 80014ec: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 80014ee: 687a ldr r2, [r7, #4] 80014f0: 68b9 ldr r1, [r7, #8] 80014f2: 6978 ldr r0, [r7, #20] 80014f4: f7ff ff90 bl 8001418 80014f8: 4602 mov r2, r0 80014fa: f997 300f ldrsb.w r3, [r7, #15] 80014fe: 4611 mov r1, r2 8001500: 4618 mov r0, r3 8001502: f7ff ff5f bl 80013c4 <__NVIC_SetPriority> } 8001506: bf00 nop 8001508: 3718 adds r7, #24 800150a: 46bd mov sp, r7 800150c: bd80 pop {r7, pc} 0800150e : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32wbxxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 800150e: b580 push {r7, lr} 8001510: b082 sub sp, #8 8001512: af00 add r7, sp, #0 8001514: 4603 mov r3, r0 8001516: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8001518: f997 3007 ldrsb.w r3, [r7, #7] 800151c: 4618 mov r0, r3 800151e: f7ff ff33 bl 8001388 <__NVIC_EnableIRQ> } 8001522: bf00 nop 8001524: 3708 adds r7, #8 8001526: 46bd mov sp, r7 8001528: bd80 pop {r7, pc} 0800152a : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 800152a: b580 push {r7, lr} 800152c: b082 sub sp, #8 800152e: af00 add r7, sp, #0 8001530: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8001532: 6878 ldr r0, [r7, #4] 8001534: f7ff ffa4 bl 8001480 8001538: 4603 mov r3, r0 } 800153a: 4618 mov r0, r3 800153c: 3708 adds r7, #8 800153e: 46bd mov sp, r7 8001540: bd80 pop {r7, pc} ... 08001544 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8001544: b480 push {r7} 8001546: b087 sub sp, #28 8001548: af00 add r7, sp, #0 800154a: 6078 str r0, [r7, #4] 800154c: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 800154e: 2300 movs r3, #0 8001550: 617b str r3, [r7, #20] assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8001552: e14c b.n 80017ee { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); 8001554: 683b ldr r3, [r7, #0] 8001556: 681a ldr r2, [r3, #0] 8001558: 2101 movs r1, #1 800155a: 697b ldr r3, [r7, #20] 800155c: fa01 f303 lsl.w r3, r1, r3 8001560: 4013 ands r3, r2 8001562: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) 8001564: 68fb ldr r3, [r7, #12] 8001566: 2b00 cmp r3, #0 8001568: f000 813e beq.w 80017e8 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) 800156c: 683b ldr r3, [r7, #0] 800156e: 685b ldr r3, [r3, #4] 8001570: f003 0303 and.w r3, r3, #3 8001574: 2b01 cmp r3, #1 8001576: d005 beq.n 8001584 8001578: 683b ldr r3, [r7, #0] 800157a: 685b ldr r3, [r3, #4] 800157c: f003 0303 and.w r3, r3, #3 8001580: 2b02 cmp r3, #2 8001582: d130 bne.n 80015e6 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 8001584: 687b ldr r3, [r7, #4] 8001586: 689b ldr r3, [r3, #8] 8001588: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2u)); 800158a: 697b ldr r3, [r7, #20] 800158c: 005b lsls r3, r3, #1 800158e: 2203 movs r2, #3 8001590: fa02 f303 lsl.w r3, r2, r3 8001594: 43db mvns r3, r3 8001596: 693a ldr r2, [r7, #16] 8001598: 4013 ands r3, r2 800159a: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); 800159c: 683b ldr r3, [r7, #0] 800159e: 68da ldr r2, [r3, #12] 80015a0: 697b ldr r3, [r7, #20] 80015a2: 005b lsls r3, r3, #1 80015a4: fa02 f303 lsl.w r3, r2, r3 80015a8: 693a ldr r2, [r7, #16] 80015aa: 4313 orrs r3, r2 80015ac: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; 80015ae: 687b ldr r3, [r7, #4] 80015b0: 693a ldr r2, [r7, #16] 80015b2: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 80015b4: 687b ldr r3, [r7, #4] 80015b6: 685b ldr r3, [r3, #4] 80015b8: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT0 << position) ; 80015ba: 2201 movs r2, #1 80015bc: 697b ldr r3, [r7, #20] 80015be: fa02 f303 lsl.w r3, r2, r3 80015c2: 43db mvns r3, r3 80015c4: 693a ldr r2, [r7, #16] 80015c6: 4013 ands r3, r2 80015c8: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 80015ca: 683b ldr r3, [r7, #0] 80015cc: 685b ldr r3, [r3, #4] 80015ce: 091b lsrs r3, r3, #4 80015d0: f003 0201 and.w r2, r3, #1 80015d4: 697b ldr r3, [r7, #20] 80015d6: fa02 f303 lsl.w r3, r2, r3 80015da: 693a ldr r2, [r7, #16] 80015dc: 4313 orrs r3, r2 80015de: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; 80015e0: 687b ldr r3, [r7, #4] 80015e2: 693a ldr r2, [r7, #16] 80015e4: 605a str r2, [r3, #4] } /* Activate the Pull-up or Pull down resistor for the current IO */ if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 80015e6: 683b ldr r3, [r7, #0] 80015e8: 685b ldr r3, [r3, #4] 80015ea: f003 0303 and.w r3, r3, #3 80015ee: 2b03 cmp r3, #3 80015f0: d017 beq.n 8001622 { temp = GPIOx->PUPDR; 80015f2: 687b ldr r3, [r7, #4] 80015f4: 68db ldr r3, [r3, #12] 80015f6: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); 80015f8: 697b ldr r3, [r7, #20] 80015fa: 005b lsls r3, r3, #1 80015fc: 2203 movs r2, #3 80015fe: fa02 f303 lsl.w r3, r2, r3 8001602: 43db mvns r3, r3 8001604: 693a ldr r2, [r7, #16] 8001606: 4013 ands r3, r2 8001608: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2U)); 800160a: 683b ldr r3, [r7, #0] 800160c: 689a ldr r2, [r3, #8] 800160e: 697b ldr r3, [r7, #20] 8001610: 005b lsls r3, r3, #1 8001612: fa02 f303 lsl.w r3, r2, r3 8001616: 693a ldr r2, [r7, #16] 8001618: 4313 orrs r3, r2 800161a: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; 800161c: 687b ldr r3, [r7, #4] 800161e: 693a ldr r2, [r7, #16] 8001620: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 8001622: 683b ldr r3, [r7, #0] 8001624: 685b ldr r3, [r3, #4] 8001626: f003 0303 and.w r3, r3, #3 800162a: 2b02 cmp r3, #2 800162c: d123 bne.n 8001676 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; 800162e: 697b ldr r3, [r7, #20] 8001630: 08da lsrs r2, r3, #3 8001632: 687b ldr r3, [r7, #4] 8001634: 3208 adds r2, #8 8001636: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800163a: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); 800163c: 697b ldr r3, [r7, #20] 800163e: f003 0307 and.w r3, r3, #7 8001642: 009b lsls r3, r3, #2 8001644: 220f movs r2, #15 8001646: fa02 f303 lsl.w r3, r2, r3 800164a: 43db mvns r3, r3 800164c: 693a ldr r2, [r7, #16] 800164e: 4013 ands r3, r2 8001650: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); 8001652: 683b ldr r3, [r7, #0] 8001654: 691a ldr r2, [r3, #16] 8001656: 697b ldr r3, [r7, #20] 8001658: f003 0307 and.w r3, r3, #7 800165c: 009b lsls r3, r3, #2 800165e: fa02 f303 lsl.w r3, r2, r3 8001662: 693a ldr r2, [r7, #16] 8001664: 4313 orrs r3, r2 8001666: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; 8001668: 697b ldr r3, [r7, #20] 800166a: 08da lsrs r2, r3, #3 800166c: 687b ldr r3, [r7, #4] 800166e: 3208 adds r2, #8 8001670: 6939 ldr r1, [r7, #16] 8001672: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 8001676: 687b ldr r3, [r7, #4] 8001678: 681b ldr r3, [r3, #0] 800167a: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); 800167c: 697b ldr r3, [r7, #20] 800167e: 005b lsls r3, r3, #1 8001680: 2203 movs r2, #3 8001682: fa02 f303 lsl.w r3, r2, r3 8001686: 43db mvns r3, r3 8001688: 693a ldr r2, [r7, #16] 800168a: 4013 ands r3, r2 800168c: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); 800168e: 683b ldr r3, [r7, #0] 8001690: 685b ldr r3, [r3, #4] 8001692: f003 0203 and.w r2, r3, #3 8001696: 697b ldr r3, [r7, #20] 8001698: 005b lsls r3, r3, #1 800169a: fa02 f303 lsl.w r3, r2, r3 800169e: 693a ldr r2, [r7, #16] 80016a0: 4313 orrs r3, r2 80016a2: 613b str r3, [r7, #16] GPIOx->MODER = temp; 80016a4: 687b ldr r3, [r7, #4] 80016a6: 693a ldr r2, [r7, #16] 80016a8: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) 80016aa: 683b ldr r3, [r7, #0] 80016ac: 685b ldr r3, [r3, #4] 80016ae: f403 3340 and.w r3, r3, #196608 @ 0x30000 80016b2: 2b00 cmp r3, #0 80016b4: f000 8098 beq.w 80017e8 { temp = SYSCFG->EXTICR[position >> 2u]; 80016b8: 4a54 ldr r2, [pc, #336] @ (800180c ) 80016ba: 697b ldr r3, [r7, #20] 80016bc: 089b lsrs r3, r3, #2 80016be: 3302 adds r3, #2 80016c0: f852 3023 ldr.w r3, [r2, r3, lsl #2] 80016c4: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); 80016c6: 697b ldr r3, [r7, #20] 80016c8: f003 0303 and.w r3, r3, #3 80016cc: 009b lsls r3, r3, #2 80016ce: 220f movs r2, #15 80016d0: fa02 f303 lsl.w r3, r2, r3 80016d4: 43db mvns r3, r3 80016d6: 693a ldr r2, [r7, #16] 80016d8: 4013 ands r3, r2 80016da: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 80016dc: 687b ldr r3, [r7, #4] 80016de: f1b3 4f90 cmp.w r3, #1207959552 @ 0x48000000 80016e2: d019 beq.n 8001718 80016e4: 687b ldr r3, [r7, #4] 80016e6: 4a4a ldr r2, [pc, #296] @ (8001810 ) 80016e8: 4293 cmp r3, r2 80016ea: d013 beq.n 8001714 80016ec: 687b ldr r3, [r7, #4] 80016ee: 4a49 ldr r2, [pc, #292] @ (8001814 ) 80016f0: 4293 cmp r3, r2 80016f2: d00d beq.n 8001710 80016f4: 687b ldr r3, [r7, #4] 80016f6: 4a48 ldr r2, [pc, #288] @ (8001818 ) 80016f8: 4293 cmp r3, r2 80016fa: d007 beq.n 800170c 80016fc: 687b ldr r3, [r7, #4] 80016fe: 4a47 ldr r2, [pc, #284] @ (800181c ) 8001700: 4293 cmp r3, r2 8001702: d101 bne.n 8001708 8001704: 2304 movs r3, #4 8001706: e008 b.n 800171a 8001708: 2307 movs r3, #7 800170a: e006 b.n 800171a 800170c: 2303 movs r3, #3 800170e: e004 b.n 800171a 8001710: 2302 movs r3, #2 8001712: e002 b.n 800171a 8001714: 2301 movs r3, #1 8001716: e000 b.n 800171a 8001718: 2300 movs r3, #0 800171a: 697a ldr r2, [r7, #20] 800171c: f002 0203 and.w r2, r2, #3 8001720: 0092 lsls r2, r2, #2 8001722: 4093 lsls r3, r2 8001724: 693a ldr r2, [r7, #16] 8001726: 4313 orrs r3, r2 8001728: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; 800172a: 4938 ldr r1, [pc, #224] @ (800180c