diff options
| author | Anson Bridges <bridges.anson@gmail.com> | 2026-02-17 11:37:50 -0800 |
|---|---|---|
| committer | Anson Bridges <bridges.anson@gmail.com> | 2026-02-17 11:37:50 -0800 |
| commit | fb1611c0ca99d9e609057c46507be2af8389bb7b (patch) | |
| tree | 646ac568fdad1e6cf9e1f5767295b183bc5c5441 /firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns | |
| parent | 6e952fe110c2a48204c8cb0a836309ab97e5979a (diff) | |
Diffstat (limited to 'firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns')
12 files changed, 4798 insertions, 0 deletions
diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/hw.h b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/hw.h new file mode 100644 index 0000000..e754555 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/hw.h @@ -0,0 +1,105 @@ +/** + ****************************************************************************** + * @file hw.h + * @author MCD Application Team + * @brief Hardware + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __HW_H +#define __HW_H + +#ifdef __cplusplus +extern "C" { +#endif + + /* Includes ------------------------------------------------------------------*/ + + /****************************************************************************** + * HW IPCC + ******************************************************************************/ + void HW_IPCC_Enable( void ); + void HW_IPCC_Init( void ); + void HW_IPCC_Rx_Handler( void ); + void HW_IPCC_Tx_Handler( void ); + + void HW_IPCC_BLE_Init( void ); + void HW_IPCC_BLE_SendCmd( void ); + void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) ); + void HW_IPCC_BLE_RxEvtNot( void ); + void HW_IPCC_BLE_SendAclData( void ); + void HW_IPCC_BLE_AclDataAckNot( void ); + + void HW_IPCC_SYS_Init( void ); + void HW_IPCC_SYS_SendCmd( void ); + void HW_IPCC_SYS_CmdEvtNot( void ); + void HW_IPCC_SYS_EvtNot( void ); + + void HW_IPCC_THREAD_Init( void ); + void HW_IPCC_OT_SendCmd( void ); + void HW_IPCC_CLI_SendCmd( void ); + void HW_IPCC_THREAD_SendAck( void ); + void HW_IPCC_OT_CmdEvtNot( void ); + void HW_IPCC_CLI_CmdEvtNot( void ); + void HW_IPCC_THREAD_EvtNot( void ); + void HW_IPCC_THREAD_CliSendAck( void ); + void HW_IPCC_THREAD_CliEvtNot( void ); + + + void HW_IPCC_LLDTESTS_Init( void ); + void HW_IPCC_LLDTESTS_SendCliCmd( void ); + void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ); + void HW_IPCC_LLDTESTS_SendCliRspAck( void ); + void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ); + void HW_IPCC_LLDTESTS_SendM0CmdAck( void ); + + + void HW_IPCC_BLE_LLD_Init( void ); + void HW_IPCC_BLE_LLD_SendCliCmd( void ); + void HW_IPCC_BLE_LLD_ReceiveCliRsp( void ); + void HW_IPCC_BLE_LLD_SendCliRspAck( void ); + void HW_IPCC_BLE_LLD_ReceiveM0Cmd( void ); + void HW_IPCC_BLE_LLD_SendM0CmdAck( void ); + void HW_IPCC_BLE_LLD_SendCmd( void ); + void HW_IPCC_BLE_LLD_ReceiveRsp( void ); + void HW_IPCC_BLE_LLD_SendRspAck( void ); + + + void HW_IPCC_TRACES_Init( void ); + void HW_IPCC_TRACES_EvtNot( void ); + + void HW_IPCC_MAC_802_15_4_Init( void ); + void HW_IPCC_MAC_802_15_4_SendCmd( void ); + void HW_IPCC_MAC_802_15_4_SendAck( void ); + void HW_IPCC_MAC_802_15_4_CmdEvtNot( void ); + void HW_IPCC_MAC_802_15_4_EvtNot( void ); + + void HW_IPCC_ZIGBEE_Init( void ); + + void HW_IPCC_ZIGBEE_SendM4RequestToM0(void); /* M4 Request to M0 */ + void HW_IPCC_ZIGBEE_RecvAppliAckFromM0(void); /* Request ACK from M0 */ + + void HW_IPCC_ZIGBEE_RecvM0NotifyToM4(void); /* M0 Notify to M4 */ + void HW_IPCC_ZIGBEE_SendM4AckToM0Notify(void); /* Notify ACK from M4 */ + void HW_IPCC_ZIGBEE_RecvM0RequestToM4(void); /* M0 Request to M4 */ + void HW_IPCC_ZIGBEE_SendM4AckToM0Request(void); /* Request ACK from M4 */ + + +#ifdef __cplusplus +} +#endif + +#endif /*__HW_H */ + diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c new file mode 100644 index 0000000..727a9e6 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c @@ -0,0 +1,762 @@ +/** + ****************************************************************************** + * @file shci.c + * @author MCD Application Team + * @brief HCI command for the system channel + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "stm32_wpan_common.h" + +#include "shci_tl.h" +#include "shci.h" +#include "stm32wbxx.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private defines -----------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Global variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Local Functions Definition ------------------------------------------------------*/ +/* Public Functions Definition ------------------------------------------------------*/ + +/** + * C2 COMMAND + * These commands are sent to the CPU2 + */ +uint8_t SHCI_C2_FUS_GetState( SHCI_FUS_GetState_ErrorCode_t *p_error_code ) +{ + /** + * Buffer is large enough to hold command complete with payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE + 1]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_GET_STATE, + 0, + 0, + p_rsp ); + + if(p_error_code != 0) + { + *p_error_code = (SHCI_FUS_GetState_ErrorCode_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[1]); + } + + return (((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_FwUpgrade( uint32_t fw_src_add, uint32_t fw_dest_add ) +{ + /** + * TL_BLEEVT_CC_BUFFER_SIZE is 16 bytes so it is large enough to hold the 8 bytes of command parameters + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + uint32_t *p_cmd; + uint8_t cmd_length; + + p_cmd = (uint32_t*)local_buffer; + cmd_length = 0; + + if(fw_src_add != 0) + { + *p_cmd = fw_src_add; + cmd_length += 4; + } + + if(fw_dest_add != 0) + { + *(p_cmd+1) = fw_dest_add; + cmd_length += 4; + } + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_FW_UPGRADE, + cmd_length, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_FwDelete( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_FW_DELETE, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_UpdateAuthKey( SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t *pParam ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_UPDATE_AUTH_KEY, + sizeof( SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t ), + (uint8_t*)pParam, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_LockAuthKey( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_LOCK_AUTH_KEY, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_StoreUsrKey( SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t *pParam, uint8_t *p_key_index ) +{ + /** + * Buffer is large enough to hold command complete with payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE + 1]; + TL_EvtPacket_t * p_rsp; + uint8_t local_payload_len; + + if(pParam->KeyType == KEYTYPE_ENCRYPTED) + { + /** + * When the key is encrypted, the 12 bytes IV Key is included in the payload as well + * The IV key is always 12 bytes + */ + local_payload_len = pParam->KeySize + 2 + 12; + } + else + { + local_payload_len = pParam->KeySize + 2; + } + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_STORE_USR_KEY, + local_payload_len , + (uint8_t*)pParam, + p_rsp ); + + *p_key_index = (((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[1]); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_LoadUsrKey( uint8_t key_index ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = key_index; + + shci_send( SHCI_OPCODE_C2_FUS_LOAD_USR_KEY, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_StartWs( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_START_WS, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_LockUsrKey( uint8_t key_index ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = key_index; + + shci_send( SHCI_OPCODE_C2_FUS_LOCK_USR_KEY, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_UnloadUsrKey( uint8_t key_index ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = key_index; + + shci_send( SHCI_OPCODE_C2_FUS_UNLOAD_USR_KEY, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_ActivateAntiRollback( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_ACTIVATE_ANTIROLLBACK, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_BLE_Init( SHCI_C2_Ble_Init_Cmd_Packet_t *pCmdPacket ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_BLE_INIT, + sizeof( SHCI_C2_Ble_Init_Cmd_Param_t ), + (uint8_t*)&pCmdPacket->Param, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_THREAD_Init( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_THREAD_INIT, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init( uint8_t param_size, uint8_t * p_param ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_LLD_TESTS_INIT, + param_size, + p_param, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_BLE_LLD_INIT, + param_size, + p_param, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_ZIGBEE_Init( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_ZIGBEE_INIT, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_DEBUG_Init( SHCI_C2_DEBUG_Init_Cmd_Packet_t *pCmdPacket ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_DEBUG_INIT, + sizeof( SHCI_C2_DEBUG_init_Cmd_Param_t ), + (uint8_t*)&pCmdPacket->Param, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FLASH_EraseActivity( SHCI_EraseActivity_t erase_activity ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = erase_activity; + + shci_send( SHCI_OPCODE_C2_FLASH_ERASE_ACTIVITY, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_CONCURRENT_SetMode( SHCI_C2_CONCURRENT_Mode_Param_t Mode ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = Mode; + + shci_send( SHCI_OPCODE_C2_CONCURRENT_SET_MODE, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_CONCURRENT_GetNextBleEvtTime( SHCI_C2_CONCURRENT_GetNextBleEvtTime_Param_t *pParam ) +{ + /** + * Buffer is large enough to hold command complete with payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE+4]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME, + 0, + 0, + p_rsp ); + + memcpy((void*)&(pParam->relative_time), (void*)&((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[1], sizeof(pParam->relative_time)); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_CONCURRENT_EnableNext_802154_EvtNotification( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FLASH_StoreData( SHCI_C2_FLASH_Ip_t Ip ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = Ip; + + shci_send( SHCI_OPCODE_C2_FLASH_STORE_DATA, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FLASH_EraseData( SHCI_C2_FLASH_Ip_t Ip ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = Ip; + + shci_send( SHCI_OPCODE_C2_FLASH_ERASE_DATA, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower( SHCI_C2_FLASH_Ip_t Ip,uint8_t FlagRadioLowPowerOn) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = Ip; + local_buffer[1] = FlagRadioLowPowerOn; + + shci_send( SHCI_OPCODE_C2_RADIO_ALLOW_LOW_POWER, + 2, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_MAC_802_15_4_Init( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_MAC_802_15_4_INIT, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_Reinit( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_REINIT, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_ExtpaConfig(uint32_t gpio_port, uint16_t gpio_pin_number, uint8_t gpio_polarity, uint8_t gpio_status) +{ + /** + * TL_BLEEVT_CC_BUFFER_SIZE is 16 bytes so it is large enough to hold the 8 bytes of command parameters + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_port = gpio_port; + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_pin_number = gpio_pin_number; + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_polarity = gpio_polarity; + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_status = gpio_status; + + shci_send( SHCI_OPCODE_C2_EXTPA_CONFIG, + 8, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t Source) +{ + /** + * TL_BLEEVT_CC_BUFFER_SIZE is 16 bytes so it is large enough to hold the 1 byte of command parameter + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = (uint8_t)Source; + + shci_send( SHCI_OPCODE_C2_SET_FLASH_ACTIVITY_CONTROL, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_CONFIG, + sizeof(SHCI_C2_CONFIG_Cmd_Param_t), + (uint8_t*)pCmdPacket, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_802_15_4_DeInit( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_802_15_4_DEINIT, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_SetSystemClock( SHCI_C2_SET_SYSTEM_CLOCK_Cmd_Param_t clockSel ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CC_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + local_buffer[0] = (uint8_t)clockSel; + + shci_send( SHCI_OPCODE_C2_SET_SYSTEM_CLOCK, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +/** + * Local System COMMAND + * These commands are NOT sent to the CPU2 + */ + +SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) +{ + uint32_t ipccdba = 0; + MB_RefTable_t * p_RefTable = NULL; + uint32_t wireless_firmware_version = 0; + uint32_t wireless_firmware_memorySize = 0; + uint32_t wireless_firmware_infoStack = 0; + MB_FUS_DeviceInfoTable_t * p_fus_device_info_table = NULL; + uint32_t fus_version = 0; + uint32_t fus_memorySize = 0; + + ipccdba = READ_BIT( FLASH->IPCCBR, FLASH_IPCCBR_IPCCDBA ); + + /** + * The Device Info Table mapping depends on which firmware is running on CPU2. + * If the FUS is running on CPU2, FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD shall be written in the table. + * Otherwise, it means the Wireless Firmware is running on the CPU2 + */ + p_fus_device_info_table = (MB_FUS_DeviceInfoTable_t*)(*(uint32_t*)((ipccdba<<2) + SRAM2A_BASE)); + + if(p_fus_device_info_table->DeviceInfoTableState == FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD) + { + /* The FUS is running on CPU2 */ + /** + * Retrieve the WirelessFwInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + wireless_firmware_version = p_fus_device_info_table->WirelessStackVersion; + wireless_firmware_memorySize = p_fus_device_info_table->WirelessStackMemorySize; + wireless_firmware_infoStack = p_fus_device_info_table->WirelessFirmwareBleInfo; + + /** + * Retrieve the FusInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + fus_version = p_fus_device_info_table->FusVersion; + fus_memorySize = p_fus_device_info_table->FusMemorySize; + } + else + { + /* The Wireless Firmware is running on CPU2 */ + p_RefTable = (MB_RefTable_t*)((ipccdba<<2) + SRAM2A_BASE); + + /** + * Retrieve the WirelessFwInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + wireless_firmware_version = p_RefTable->p_device_info_table->WirelessFwInfoTable.Version; + wireless_firmware_memorySize = p_RefTable->p_device_info_table->WirelessFwInfoTable.MemorySize; + wireless_firmware_infoStack = p_RefTable->p_device_info_table->WirelessFwInfoTable.InfoStack; + + /** + * Retrieve the FusInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + fus_version = p_RefTable->p_device_info_table->FusInfoTable.Version; + fus_memorySize = p_RefTable->p_device_info_table->FusInfoTable.MemorySize; + } + + /** + * Retrieve the WirelessFwInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + pWirelessInfo->VersionMajor = ((wireless_firmware_version & INFO_VERSION_MAJOR_MASK) >> INFO_VERSION_MAJOR_OFFSET); + pWirelessInfo->VersionMinor = ((wireless_firmware_version & INFO_VERSION_MINOR_MASK) >> INFO_VERSION_MINOR_OFFSET); + pWirelessInfo->VersionSub = ((wireless_firmware_version & INFO_VERSION_SUB_MASK) >> INFO_VERSION_SUB_OFFSET); + pWirelessInfo->VersionBranch = ((wireless_firmware_version & INFO_VERSION_BRANCH_MASK) >> INFO_VERSION_BRANCH_OFFSET); + pWirelessInfo->VersionReleaseType = ((wireless_firmware_version & INFO_VERSION_TYPE_MASK) >> INFO_VERSION_TYPE_OFFSET); + + pWirelessInfo->MemorySizeSram2B = ((wireless_firmware_memorySize & INFO_SIZE_SRAM2B_MASK) >> INFO_SIZE_SRAM2B_OFFSET); + pWirelessInfo->MemorySizeSram2A = ((wireless_firmware_memorySize & INFO_SIZE_SRAM2A_MASK) >> INFO_SIZE_SRAM2A_OFFSET); + pWirelessInfo->MemorySizeSram1 = ((wireless_firmware_memorySize & INFO_SIZE_SRAM1_MASK) >> INFO_SIZE_SRAM1_OFFSET); + pWirelessInfo->MemorySizeFlash = ((wireless_firmware_memorySize & INFO_SIZE_FLASH_MASK) >> INFO_SIZE_FLASH_OFFSET); + + pWirelessInfo->StackType = ((wireless_firmware_infoStack & INFO_STACK_TYPE_MASK) >> INFO_STACK_TYPE_OFFSET); + + /** + * Retrieve the FusInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + pWirelessInfo->FusVersionMajor = ((fus_version & INFO_VERSION_MAJOR_MASK) >> INFO_VERSION_MAJOR_OFFSET); + pWirelessInfo->FusVersionMinor = ((fus_version & INFO_VERSION_MINOR_MASK) >> INFO_VERSION_MINOR_OFFSET); + pWirelessInfo->FusVersionSub = ((fus_version & INFO_VERSION_SUB_MASK) >> INFO_VERSION_SUB_OFFSET); + + pWirelessInfo->FusMemorySizeSram2B = ((fus_memorySize & INFO_SIZE_SRAM2B_MASK) >> INFO_SIZE_SRAM2B_OFFSET); + pWirelessInfo->FusMemorySizeSram2A = ((fus_memorySize & INFO_SIZE_SRAM2A_MASK) >> INFO_SIZE_SRAM2A_OFFSET); + pWirelessInfo->FusMemorySizeFlash = ((fus_memorySize & INFO_SIZE_FLASH_MASK) >> INFO_SIZE_FLASH_OFFSET); + + return (SHCI_Success); +} + diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.h b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.h new file mode 100644 index 0000000..438d4b6 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.h @@ -0,0 +1,1411 @@ +/** + ****************************************************************************** + * @file shci.h + * @author MCD Application Team + * @brief HCI command for the system channel + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __SHCI_H +#define __SHCI_H + +#ifdef __cplusplus +extern "C" { +#endif + + /* Includes ------------------------------------------------------------------*/ +#include "mbox_def.h" /* Requested to expose the MB_WirelessFwInfoTable_t structure */ + + /* Exported types ------------------------------------------------------------*/ + + /* SYSTEM EVENT */ + typedef enum + { + WIRELESS_FW_RUNNING = 0x00, + FUS_FW_RUNNING = 0x01, + } SHCI_SysEvt_Ready_Rsp_t; + + /* ERROR CODES + * + * These error codes are detected on CPU2 side and are send back to the CPU1 via a system + * notification message. It is up to the application running on CPU1 to manage these errors + * + * These errors can be generated by all layers (low level driver, stack, framework infrastructure, etc..) + */ + typedef enum + { + ERR_BLE_INIT = 0, /* This event is currently not reported by the CPU2 */ + ERR_THREAD_LLD_FATAL_ERROR = 125, /* The LLD driver used on 802_15_4 detected a fatal error */ + ERR_THREAD_UNKNOWN_CMD = 126, /* The command send by the CPU1 to control the Thread stack is unknown */ + ERR_ZIGBEE_UNKNOWN_CMD = 200, /* The command send by the CPU1 to control the Zigbee stack is unknown */ + } SCHI_SystemErrCode_t; + +#define SHCI_EVTCODE ( 0xFF ) +#define SHCI_SUB_EVT_CODE_BASE ( 0x9200 ) + + /** + * THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU1 DEFINITION + */ + typedef enum + { + SHCI_SUB_EVT_CODE_READY = SHCI_SUB_EVT_CODE_BASE, + SHCI_SUB_EVT_ERROR_NOTIF, + SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE, + SHCI_SUB_EVT_THREAD_NVM_RAM_UPDATE, + SHCI_SUB_EVT_NVM_START_WRITE, + SHCI_SUB_EVT_NVM_END_WRITE, + SHCI_SUB_EVT_NVM_START_ERASE, + SHCI_SUB_EVT_NVM_END_ERASE, + SHCI_SUB_EVT_CODE_CONCURRENT_802154_EVT, + } SHCI_SUB_EVT_CODE_t; + + /** + * SHCI_SUB_EVT_CODE_READY + * This notifies the CPU1 that the CPU2 is now ready to receive commands + * It reports as well which firmware is running on CPU2 : The wireless stack of the FUS (previously named RSS) + */ + typedef PACKED_STRUCT{ + SHCI_SysEvt_Ready_Rsp_t sysevt_ready_rsp; + } SHCI_C2_Ready_Evt_t; + + /** + * SHCI_SUB_EVT_ERROR_NOTIF + * This reports to the CPU1 some error form the CPU2 + */ + typedef PACKED_STRUCT{ + SCHI_SystemErrCode_t errorCode; + } SHCI_C2_ErrorNotif_Evt_t; + + /** + * SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE + * This notifies the CPU1 which part of the BLE NVM RAM has been updated so that only the modified + * section could be written in Flash/NVM + * StartAddress : Start address of the section that has been modified + * Size : Size (in bytes) of the section that has been modified + */ + typedef PACKED_STRUCT{ + uint32_t StartAddress; + uint32_t Size; + } SHCI_C2_BleNvmRamUpdate_Evt_t; + + /** + * SHCI_SUB_EVT_THREAD_NVM_RAM_UPDATE + * This notifies the CPU1 which part of the OT NVM RAM has been updated so that only the modified + * section could be written in Flash/NVM + * StartAddress : Start address of the section that has been modified + * Size : Size (in bytes) of the section that has been modified + */ + typedef PACKED_STRUCT{ + uint32_t StartAddress; + uint32_t Size; + } SHCI_C2_ThreadNvmRamUpdate_Evt_t; + + /** + * SHCI_SUB_EVT_NVM_START_WRITE + * This notifies the CPU1 that the CPU2 has started a write procedure in Flash + * NumberOfWords : The number of 64bits data the CPU2 needs to write in Flash. + * For each 64bits data, the algorithm as described in AN5289 is executed. + * When this number is reported to 0, it means the Number of 64bits to be written + * was unknown when the procedure has started. + * When all data are written, the SHCI_SUB_EVT_NVM_END_WRITE event is reported + */ + typedef PACKED_STRUCT{ + uint32_t NumberOfWords; + } SHCI_C2_NvmStartWrite_Evt_t; + + /** + * SHCI_SUB_EVT_NVM_END_WRITE + * This notifies the CPU1 that the CPU2 has written all expected data in Flash + */ + + /** + * SHCI_SUB_EVT_NVM_START_ERASE + * This notifies the CPU1 that the CPU2 has started a erase procedure in Flash + * NumberOfSectors : The number of sectors the CPU2 needs to erase in Flash. + * For each sector, the algorithm as described in AN5289 is executed. + * When this number is reported to 0, it means the Number of sectors to be erased + * was unknown when the procedure has started. + * When all sectors are erased, the SHCI_SUB_EVT_NVM_END_ERASE event is reported + */ + typedef PACKED_STRUCT{ + uint32_t NumberOfSectors; + } SHCI_C2_NvmStartErase_Evt_t; + + /** + * SHCI_SUB_EVT_NVM_END_ERASE + * This notifies the CPU1 that the CPU2 has erased all expected flash sectors + */ + + /* SYSTEM COMMAND */ + typedef PACKED_STRUCT + { + /** + * MetaData holds : + * 2*32bits for chaining list + * 1*32bits with BLE header (type + Opcode + Length) + */ + uint32_t MetaData[3]; + } SHCI_Header_t; + + typedef enum + { + SHCI_Success = 0x00, + SHCI_UNKNOWN_CMD = 0x01, + SHCI_MEMORY_CAPACITY_EXCEEDED_ERR_CODE= 0x07, + SHCI_ERR_UNSUPPORTED_FEATURE = 0x11, + SHCI_ERR_INVALID_HCI_CMD_PARAMS = 0x12, + SHCI_ERR_INVALID_PARAMS = 0x42, /* only used for release < v1.13.0 */ + SHCI_ERR_INVALID_PARAMS_V2 = 0x92, /* available for release >= v1.13.0 */ + SHCI_FUS_CMD_NOT_SUPPORTED = 0xFF, + } SHCI_CmdStatus_t; + + typedef enum + { + SHCI_8BITS = 0x01, + SHCI_16BITS = 0x02, + SHCI_32BITS = 0x04, + } SHCI_Busw_t; + +#define SHCI_OGF ( 0x3F ) +#define SHCI_OCF_BASE ( 0x50 ) + + /** + * THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU2 DEFINITION + */ + typedef enum + { + SHCI_OCF_C2_RESERVED1 = SHCI_OCF_BASE, + SHCI_OCF_C2_RESERVED2, + SHCI_OCF_C2_FUS_GET_STATE, + SHCI_OCF_C2_FUS_RESERVED1, + SHCI_OCF_C2_FUS_FW_UPGRADE, + SHCI_OCF_C2_FUS_FW_DELETE, + SHCI_OCF_C2_FUS_UPDATE_AUTH_KEY, + SHCI_OCF_C2_FUS_LOCK_AUTH_KEY, + SHCI_OCF_C2_FUS_STORE_USR_KEY, + SHCI_OCF_C2_FUS_LOAD_USR_KEY, + SHCI_OCF_C2_FUS_START_WS, + SHCI_OCF_C2_FUS_RESERVED2, + SHCI_OCF_C2_FUS_RESERVED3, + SHCI_OCF_C2_FUS_LOCK_USR_KEY, + SHCI_OCF_C2_FUS_UNLOAD_USR_KEY, + SHCI_OCF_C2_FUS_ACTIVATE_ANTIROLLBACK, + SHCI_OCF_C2_FUS_RESERVED7, + SHCI_OCF_C2_FUS_RESERVED8, + SHCI_OCF_C2_FUS_RESERVED9, + SHCI_OCF_C2_FUS_RESERVED10, + SHCI_OCF_C2_FUS_RESERVED11, + SHCI_OCF_C2_FUS_RESERVED12, + SHCI_OCF_C2_BLE_INIT, + SHCI_OCF_C2_THREAD_INIT, + SHCI_OCF_C2_DEBUG_INIT, + SHCI_OCF_C2_FLASH_ERASE_ACTIVITY, + SHCI_OCF_C2_CONCURRENT_SET_MODE, + SHCI_OCF_C2_FLASH_STORE_DATA, + SHCI_OCF_C2_FLASH_ERASE_DATA, + SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER, + SHCI_OCF_C2_MAC_802_15_4_INIT, + SHCI_OCF_C2_REINIT, + SHCI_OCF_C2_ZIGBEE_INIT, + SHCI_OCF_C2_LLD_TESTS_INIT, + SHCI_OCF_C2_EXTPA_CONFIG, + SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL, + SHCI_OCF_C2_BLE_LLD_INIT, + SHCI_OCF_C2_CONFIG, + SHCI_OCF_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME, + SHCI_OCF_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION, + SHCI_OCF_C2_802_15_4_DEINIT, + SHCI_OCF_C2_SET_SYSTEM_CLOCK, + } SHCI_OCF_t; + +#define SHCI_OPCODE_C2_FUS_GET_STATE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_GET_STATE) +/** No command parameters */ +/** Response parameters*/ +/** It responds a 1 byte value holding FUS State error code when the FUS State value is 0xFF (FUS_STATE_VALUE_ERROR) */ + typedef enum + { + FUS_STATE_ERROR_NO_ERROR = 0x00, + FUS_STATE_ERROR_IMG_NOT_FOUND = 0x01, + FUS_STATE_ERROR_IMG_CORRUPT = 0x02, + FUS_STATE_ERROR_IMG_NOT_AUTHENTIC = 0x03, + FUS_STATE_ERROR_IMG_NOT_ENOUGH_SPACE = 0x04, + FUS_STATE_ERROR_IMAGE_USRABORT = 0x05, + FUS_STATE_ERROR_IMAGE_ERSERROR = 0x06, + FUS_STATE_ERROR_IMAGE_WRTERROR = 0x07, + FUS_STATE_ERROR_AUTH_TAG_ST_NOTFOUND = 0x08, + FUS_STATE_ERROR_AUTH_TAG_CUST_NOTFOUND = 0x09, + FUS_STATE_ERROR_AUTH_KEY_LOCKED = 0x0A, + FUS_STATE_ERROR_FW_ROLLBACK_ERROR = 0x11, + FUS_STATE_ERROR_STATE_NOT_RUNNING = 0xFE, + FUS_STATE_ERROR_ERR_UNKNOWN = 0xFF, + } SHCI_FUS_GetState_ErrorCode_t; + + enum + { + FUS_STATE_VALUE_IDLE = 0x00, + FUS_STATE_VALUE_FW_UPGRD_ONGOING = 0x10, + FUS_STATE_VALUE_FW_UPGRD_ONGOING_END = 0x1F, /* All values between 0x10 and 0x1F has the same meaning */ + FUS_STATE_VALUE_FUS_UPGRD_ONGOING = 0x20, + FUS_STATE_VALUE_FUS_UPGRD_ONGOING_END = 0x2F, /* All values between 0x20 and 0x2F has the same meaning */ + FUS_STATE_VALUE_SERVICE_ONGOING = 0x30, + FUS_STATE_VALUE_SERVICE_ONGOING_END = 0x3F, /* All values between 0x30 and 0x3F has the same meaning */ + FUS_STATE_VALUE_ERROR = 0xFF, + }; + +#define SHCI_OPCODE_C2_FUS_RESERVED1 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED1) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_FW_UPGRADE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_FW_UPGRADE) + /** No structure for command parameters */ + /** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_FW_DELETE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_FW_DELETE) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_UPDATE_AUTH_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_UPDATE_AUTH_KEY) + typedef PACKED_STRUCT{ + uint8_t KeySize; + uint8_t KeyData[64]; + } SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t; + + /** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_LOCK_AUTH_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_LOCK_AUTH_KEY) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_STORE_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_STORE_USR_KEY) + /** Command parameters */ + /* List of supported key type */ + enum + { + KEYTYPE_NONE = 0x00, + KEYTYPE_SIMPLE = 0x01, + KEYTYPE_MASTER = 0x02, + KEYTYPE_ENCRYPTED = 0x03, + }; + + /* List of supported key size */ + enum + { + KEYSIZE_16 = 16, + KEYSIZE_32 = 32, + }; + + typedef PACKED_STRUCT{ + uint8_t KeyType; + uint8_t KeySize; + uint8_t KeyData[32 + 12]; + } SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t; + + /** Response parameters*/ + /** It responds a 1 byte value holding the index given for the stored key */ + +#define SHCI_OPCODE_C2_FUS_LOAD_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_LOAD_USR_KEY) + /** Command parameters */ + /** 1 byte holding the key index value */ + + /** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_START_WS (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_START_WS) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED2 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED2) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED3 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED3) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_LOCK_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_LOCK_USR_KEY) + /** Command parameters */ + /** 1 byte holding the key index value */ + + /** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_UNLOAD_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_UNLOAD_USR_KEY) +/** No command parameters */ +/** 1 byte holding the key index value */ + +#define SHCI_OPCODE_C2_FUS_ACTIVATE_ANTIROLLBACK (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_ACTIVATE_ANTIROLLBACK) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED7 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED7) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED8 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED8) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED9 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED9) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED10 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED10) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED11 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED11) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_FUS_RESERVED12 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED12) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_BLE_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_BLE_INIT) + /** THE ORDER SHALL NOT BE CHANGED */ + typedef PACKED_STRUCT{ + uint8_t* pBleBufferAddress; /**< NOT USED - shall be set to 0 */ + uint32_t BleBufferSize; /**< NOT USED - shall be set to 0 */ + + /** + * NumAttrRecord + * Maximum number of attribute records related to all the required characteristics (excluding the services) + * that can be stored in the GATT database, for the specific BLE user application. + * For each characteristic, the number of attribute records goes from two to five depending on the characteristic properties: + * - minimum of two (one for declaration and one for the value) + * - add one more record for each additional property: notify or indicate, broadcast, extended property. + * The total calculated value must be increased by 9, due to the records related to the standard attribute profile and + * GAP service characteristics, and automatically added when initializing GATT and GAP layers + * - Min value: <number of user attributes> + 9 + * - Max value: depending on the GATT database defined by user application + */ + uint16_t NumAttrRecord; + + /** + * NumAttrServ + * Defines the maximum number of services that can be stored in the GATT database. Note that the GAP and GATT services + * are automatically added at initialization so this parameter must be the number of user services increased by two. + * - Min value: <number of user service> + 2 + * - Max value: depending GATT database defined by user application + */ + uint16_t NumAttrServ; + + /** + * AttrValueArrSize + * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) + * + * Size of the storage area for the attribute values. + * Each characteristic contributes to the attrValueArrSize value as follows: + * - Characteristic value length plus: + * + 5 bytes if characteristic UUID is 16 bits + * + 19 bytes if characteristic UUID is 128 bits + * + 2 bytes if characteristic has a server configuration descriptor + * + 2 bytes * NumOfLinks if the characteristic has a client configuration descriptor + * + 2 bytes if the characteristic has extended properties + * Each descriptor contributes to the attrValueArrSize value as follows: + * - Descriptor length + */ + uint16_t AttrValueArrSize; + + /** + * NumOfLinks + * Maximum number of BLE links supported + * - Min value: 1 + * - Max value: 8 + */ + uint8_t NumOfLinks; + + /** + * ExtendedPacketLengthEnable + * Disable/enable the extended packet length BLE 5.0 feature + * - Disable: 0 + * - Enable: 1 + */ + uint8_t ExtendedPacketLengthEnable; + + /** + * PrWriteListSize + * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) + * + * Maximum number of supported "prepare write request" + * - Min value: given by the macro DEFAULT_PREP_WRITE_LIST_SIZE + * - Max value: a value higher than the minimum required can be specified, but it is not recommended + */ + uint8_t PrWriteListSize; + + /** + * MblockCount + * NOTE: This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter "Options" is set to "LL_only" + * ( see Options description in that structure ) + * + * Number of allocated memory blocks for the BLE stack + * - Min value: given by the macro MBLOCKS_CALC + * - Max value: a higher value can improve data throughput performance, but uses more memory + */ + uint8_t MblockCount; + + /** + * AttMtu + * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) + * + * Maximum ATT MTU size supported + * - Min value: 23 + * - Max value: 512 + */ + uint16_t AttMtu; + + /** + * PeripheralSca + * The sleep clock accuracy (ppm value) that used in BLE connected Peripheral mode to calculate the window widening + * (in combination with the sleep clock accuracy sent by master in CONNECT_REQ PDU), + * refer to BLE 5.0 specifications - Vol 6 - Part B - chap 4.5.7 and 4.2.2 + * - Min value: 0 + * - Max value: 500 (worst possible admitted by specification) + */ + uint16_t PeripheralSca; + + /** + * CentralSca + * The sleep clock accuracy handled in Central mode. It is used to determine the connection and advertising events timing. + * It is transmitted to the slave in CONNEC_REQ PDU used by the slave to calculate the window widening, + * see PeripheralSca and Bluetooth Core Specification v5.0 Vol 6 - Part B - chap 4.5.7 and 4.2.2 + * Possible values: + * - 251 ppm to 500 ppm: 0 + * - 151 ppm to 250 ppm: 1 + * - 101 ppm to 150 ppm: 2 + * - 76 ppm to 100 ppm: 3 + * - 51 ppm to 75 ppm: 4 + * - 31 ppm to 50 ppm: 5 + * - 21 ppm to 30 ppm: 6 + * - 0 ppm to 20 ppm: 7 + */ + uint8_t CentralSca; + + /** + * LsSource + * Some information for Low speed clock mapped in bits field + * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source + * - bit 1: 1: STM32W5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module + * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config + */ + uint8_t LsSource; + + /** + * MaxConnEventLength + * This parameter determines the maximum duration of a slave connection event. When this duration is reached the slave closes + * the current connections event (whatever is the CE_length parameter specified by the master in HCI_CREATE_CONNECTION HCI command), + * expressed in units of 625/256 us (~2.44 us) + * - Min value: 0 (if 0 is specified, the master and slave perform only a single TX-RX exchange per connection event) + * - Max value: 1638400 (4000 ms). A higher value can be specified (max 0xFFFFFFFF) but results in a maximum connection time + * of 4000 ms as specified. In this case the parameter is not applied, and the predicted CE length calculated on slave is not shortened + */ + uint32_t MaxConnEventLength; + + /** + * HsStartupTime + * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us). + * - Min value: 0 + * - Max value: 820 (~2 ms). A higher value can be specified, but the value that implemented in stack is forced to ~2 ms + */ + uint16_t HsStartupTime; + + /** + * ViterbiEnable + * Viterbi implementation in BLE LL reception. + * - 0: Enable + * - 1: Disable + */ + uint8_t ViterbiEnable; + + /** + * Options flags + * - bit 0: 1: LL only 0: LL + host + * - bit 1: 1: no service change desc. 0: with service change desc. + * - bit 2: 1: device name Read-Only 0: device name R/W + * - bit 3: 1: extended advertizing supported 0: extended advertizing not supported + * - bit 4: 1: CS Algo #2 supported 0: CS Algo #2 not supported + * - bit 5: 1: Reduced GATT database in NVM 0: Full GATT database in NVM + * - bit 6: 1: GATT caching is used 0: GATT caching is not used + * - bit 7: 1: LE Power Class 1 0: LE Power Class 2-3 + * - other bits: complete with Options_extension flag + */ + uint8_t Options; + + /** + * HwVersion + * Reserved for future use - shall be set to 0 + */ + uint8_t HwVersion; + + /** + * Maximum number of connection-oriented channels in initiator mode. + * Range: 0 .. 64 + */ + uint8_t max_coc_initiator_nbr; + + /** + * Minimum transmit power in dBm supported by the Controller. + * Range: -127 .. 20 + */ + int8_t min_tx_power; + + /** + * Maximum transmit power in dBm supported by the Controller. + * Range: -127 .. 20 + */ + int8_t max_tx_power; + + /** + * RX model configuration + * - bit 0: 1: agc_rssi model improved vs RF blockers 0: Legacy agc_rssi model + * - other bits: reserved ( shall be set to 0) + */ + uint8_t rx_model_config; + + /** Maximum number of advertising sets. + * Range: 1 .. 8 with limitation: + * This parameter is linked to max_adv_data_len such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when Options has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + uint8_t max_adv_set_nbr; + + /** Maximum advertising data length (in bytes) + * Range: 31 .. 1650 with limitation: + * This parameter is linked to max_adv_set_nbr such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when Options has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + uint16_t max_adv_data_len; + + /** RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + int16_t tx_path_compens; + + /** RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + int16_t rx_path_compens; + + /** BLE core specification version (8-bit unsigned integer). + * values as: 11(5.2), 12(5.3), 13(5.4) + */ + uint8_t ble_core_version; + + /** + * Options flags extension + * - bit 0: 1: appearance Writable 0: appearance Read-Only + * - bit 1: 1: Enhanced ATT supported 0: Enhanced ATT not supported + * - other bits: reserved ( shall be set to 0) + */ + uint8_t Options_extension; + + /** + * MaxAddEattBearers + * + * Maximum number of bearers that can be created for Enhanced ATT + * in addition to the number of links + * - Range: 0 .. 4 + */ + uint8_t MaxAddEattBearers; + + } SHCI_C2_Ble_Init_Cmd_Param_t; + + typedef PACKED_STRUCT{ + SHCI_Header_t Header; /** Does not need to be initialized by the user */ + SHCI_C2_Ble_Init_Cmd_Param_t Param; + } SHCI_C2_Ble_Init_Cmd_Packet_t; + + /** + * Options + * Each definition below may be added together to build the Options value + * WARNING : Only one definition per bit shall be added to build the Options value + */ +#define SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY (1<<0) +#define SHCI_C2_BLE_INIT_OPTIONS_LL_HOST (0<<0) + +#define SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC (1<<1) +#define SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC (0<<1) + +#define SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO (1<<2) +#define SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW (0<<2) + +#define SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV (1<<3) +#define SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV (0<<3) + +#define SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 (1<<4) +#define SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 (0<<4) + +#define SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM (1<<5) +#define SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM (0<<5) + +#define SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED (1<<6) +#define SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED (0<<6) + +#define SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 (1<<7) +#define SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 (0<<7) + + /** + * Options extension + * Each definition below may be added together to build the Options value + * WARNING : Only one definition per bit shall be added to build the Options value + */ +#define SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE (1<<0) +#define SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY (0<<0) + +#define SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED (1<<1) +#define SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED (0<<1) + + /** + * RX models configuration + */ +#define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY (0<<0) +#define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER (1<<0) + + /** + * BLE core version + */ +#define SHCI_C2_BLE_INIT_BLE_CORE_5_2 11 +#define SHCI_C2_BLE_INIT_BLE_CORE_5_3 12 +#define SHCI_C2_BLE_INIT_BLE_CORE_5_4 13 + + /** + * LsSource information + */ +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB (0<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CALIB (1<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV (0<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV (1<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE (0<<2) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_HSE_1024 (1<<2) + +#define SHCI_OPCODE_C2_THREAD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_THREAD_INIT) +/** No command parameters */ +/** No response parameters*/ + +#define SHCI_OPCODE_C2_DEBUG_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_DEBUG_INIT) + /** Command parameters */ + typedef PACKED_STRUCT + { + uint8_t thread_config; + uint8_t ble_config; + uint8_t mac_802_15_4_config; + uint8_t zigbee_config; + } SHCI_C2_DEBUG_TracesConfig_t; + + typedef PACKED_STRUCT + { + uint8_t ble_dtb_cfg; + /** + * sys_dbg_cfg1 options flag + * - bit 0: 0: IP BLE core in LP mode 1: IP BLE core in run mode (no LP supported) + * - bit 1: 0: CPU2 STOP mode Enable 1: CPU2 STOP mode Disable + * - bit [2-7]: bits reserved ( shall be set to 0) + */ + uint8_t sys_dbg_cfg1; + uint8_t reserved[2]; + uint16_t STBY_DebugGpioaPinList; + uint16_t STBY_DebugGpiobPinList; + uint16_t STBY_DebugGpiocPinList; + uint16_t STBY_DtbGpioaPinList; + uint16_t STBY_DtbGpiobPinList; + } SHCI_C2_DEBUG_GeneralConfig_t; + + typedef PACKED_STRUCT{ + uint8_t *pGpioConfig; + uint8_t *pTracesConfig; + uint8_t *pGeneralConfig; + uint8_t GpioConfigSize; + uint8_t TracesConfigSize; + uint8_t GeneralConfigSize; + } SHCI_C2_DEBUG_init_Cmd_Param_t; + + typedef PACKED_STRUCT{ + SHCI_Header_t Header; /** Does not need to be initialized by the user */ + SHCI_C2_DEBUG_init_Cmd_Param_t Param; + } SHCI_C2_DEBUG_Init_Cmd_Packet_t; + /** No response parameters*/ + + /** + * Options + * Each definition below may be added together to build the Options value + * WARNING : Only one definition per bit shall be added to build the Options value + */ +#define SHCI_C2_DEBUG_OPTIONS_IPCORE_LP (0<<0) +#define SHCI_C2_DEBUG_OPTIONS_IPCORE_NO_LP (1<<0) + +#define SHCI_C2_DEBUG_OPTIONS_CPU2_STOP_EN (0<<1) +#define SHCI_C2_DEBUG_OPTIONS_CPU2_STOP_DIS (1<<1) + + +#define SHCI_OPCODE_C2_FLASH_ERASE_ACTIVITY (( SHCI_OGF << 10) + SHCI_OCF_C2_FLASH_ERASE_ACTIVITY) + /** Command parameters */ + typedef enum + { + ERASE_ACTIVITY_OFF = 0x00, + ERASE_ACTIVITY_ON = 0x01, + } SHCI_EraseActivity_t; + + /** No response parameters*/ + +#define SHCI_OPCODE_C2_CONCURRENT_SET_MODE (( SHCI_OGF << 10) + SHCI_OCF_C2_CONCURRENT_SET_MODE) +/** command parameters */ + typedef enum + { + BLE_ENABLE, + THREAD_ENABLE, + ZIGBEE_ENABLE, + MAC_ENABLE, + } SHCI_C2_CONCURRENT_Mode_Param_t; + /** No response parameters*/ + +#define SHCI_OPCODE_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME (( SHCI_OGF << 10) + SHCI_OCF_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME) +/** command parameters */ + typedef PACKED_STRUCT + { + uint32_t relative_time; + } SHCI_C2_CONCURRENT_GetNextBleEvtTime_Param_t; + /** No response parameters*/ + +#define SHCI_OPCODE_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION (( SHCI_OGF << 10) + SHCI_OCF_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION) + /** No command parameters */ + /** No response parameters*/ + +#define SHCI_OPCODE_C2_FLASH_STORE_DATA (( SHCI_OGF << 10) + SHCI_OCF_C2_FLASH_STORE_DATA) +#define SHCI_OPCODE_C2_FLASH_ERASE_DATA (( SHCI_OGF << 10) + SHCI_OCF_C2_FLASH_ERASE_DATA) +/** command parameters */ + typedef enum + { + BLE_IP, + THREAD_IP, + ZIGBEE_IP, + } SHCI_C2_FLASH_Ip_t; + /** No response parameters*/ + +#define SHCI_OPCODE_C2_RADIO_ALLOW_LOW_POWER (( SHCI_OGF << 10) + SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER) + +#define SHCI_OPCODE_C2_MAC_802_15_4_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_MAC_802_15_4_INIT) + +#define SHCI_OPCODE_C2_REINIT (( SHCI_OGF << 10) + SHCI_OCF_C2_REINIT) + +#define SHCI_OPCODE_C2_ZIGBEE_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_ZIGBEE_INIT) + +#define SHCI_OPCODE_C2_LLD_TESTS_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_LLD_TESTS_INIT) + +#define SHCI_OPCODE_C2_BLE_LLD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_BLE_LLD_INIT) + +#define SHCI_OPCODE_C2_EXTPA_CONFIG (( SHCI_OGF << 10) + SHCI_OCF_C2_EXTPA_CONFIG) + /** Command parameters */ + enum + { + EXT_PA_ENABLED_LOW, + EXT_PA_ENABLED_HIGH, + }/* gpio_polarity */; + + enum + { + EXT_PA_DISABLED, + EXT_PA_ENABLED, + }/* gpio_status */; + + typedef PACKED_STRUCT{ + uint32_t gpio_port; + uint16_t gpio_pin_number; + uint8_t gpio_polarity; + uint8_t gpio_status; + } SHCI_C2_EXTPA_CONFIG_Cmd_Param_t; + + /** No response parameters*/ + +#define SHCI_OPCODE_C2_SET_FLASH_ACTIVITY_CONTROL (( SHCI_OGF << 10) + SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL) + /** Command parameters */ + typedef enum + { + FLASH_ACTIVITY_CONTROL_PES, + FLASH_ACTIVITY_CONTROL_SEM7, + }SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t; + + /** No response parameters*/ + +#define SHCI_OPCODE_C2_CONFIG (( SHCI_OGF << 10) + SHCI_OCF_C2_CONFIG) + + /** Command parameters */ + typedef PACKED_STRUCT{ + uint8_t PayloadCmdSize; + uint8_t Config1; + uint8_t EvtMask1; + uint8_t Spare1; + uint32_t BleNvmRamAddress; + uint32_t ThreadNvmRamAddress; + uint16_t RevisionID; + uint16_t DeviceID; + } SHCI_C2_CONFIG_Cmd_Param_t; + +#define SHCI_OPCODE_C2_802_15_4_DEINIT (( SHCI_OGF << 10) + SHCI_OCF_C2_802_15_4_DEINIT) + +#define SHCI_OPCODE_C2_SET_SYSTEM_CLOCK (( SHCI_OGF << 10) + SHCI_OCF_C2_SET_SYSTEM_CLOCK) + /** Command parameters */ + typedef enum + { + SET_SYSTEM_CLOCK_HSE_TO_PLL, + SET_SYSTEM_CLOCK_PLL_ON_TO_HSE, + SET_SYSTEM_CLOCK_PLL_OFF_TO_HSE, + }SHCI_C2_SET_SYSTEM_CLOCK_Cmd_Param_t; + +/** + * PayloadCmdSize + * Value that shall be used + */ +#define SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE (sizeof(SHCI_C2_CONFIG_Cmd_Param_t) - 1) + +/** + * Device revision ID + */ +#define SHCI_C2_CONFIG_CUT2_0 (0x2000) +#define SHCI_C2_CONFIG_CUT2_1 (0x2001) +#define SHCI_C2_CONFIG_CUT2_2 (0x2003) + +/** + * Device ID + */ +#define SHCI_C2_CONFIG_STM32WB55xx (0x495) +#define SHCI_C2_CONFIG_STM32WB15xx (0x494) + +/** + * Config1 + * Each definition below may be added together to build the Config1 value + * WARNING : Only one definition per bit shall be added to build the Config1 value + */ +#define SHCI_C2_CONFIG_CONFIG1_BIT0_BLE_NVM_DATA_TO_INTERNAL_FLASH (0<<0) +#define SHCI_C2_CONFIG_CONFIG1_BIT0_BLE_NVM_DATA_TO_SRAM (1<<0) +#define SHCI_C2_CONFIG_CONFIG1_BIT1_THREAD_NVM_DATA_TO_INTERNAL_FLASH (0<<1) +#define SHCI_C2_CONFIG_CONFIG1_BIT1_THREAD_NVM_DATA_TO_SRAM (1<<1) +#define SHCI_C2_CONFIG_CONFIG1_BIT2_SET_EUI64_FORMAT (1<<2) + +/** + * EvtMask1 + * Each definition below may be added together to build the EvtMask1 value + */ +#define SHCI_C2_CONFIG_EVTMASK1_BIT0_ERROR_NOTIF_ENABLE (1<<0) +#define SHCI_C2_CONFIG_EVTMASK1_BIT1_BLE_NVM_RAM_UPDATE_ENABLE (1<<1) +#define SHCI_C2_CONFIG_EVTMASK1_BIT2_THREAD_NVM_RAM_UPDATE_ENABLE (1<<2) +#define SHCI_C2_CONFIG_EVTMASK1_BIT3_NVM_START_WRITE_ENABLE (1<<3) +#define SHCI_C2_CONFIG_EVTMASK1_BIT4_NVM_END_WRITE_ENABLE (1<<4) +#define SHCI_C2_CONFIG_EVTMASK1_BIT5_NVM_START_ERASE_ENABLE (1<<5) +#define SHCI_C2_CONFIG_EVTMASK1_BIT6_NVM_END_ERASE_ENABLE (1<<6) + +/** + * BleNvmRamAddress + * The buffer shall have a size of BLE_NVM_SRAM_SIZE number of 32bits + * The buffer shall be allocated in SRAM2 + */ +#define BLE_NVM_SRAM_SIZE (507) + +/** + * ThreadNvmRamAddress + * The buffer shall have a size of THREAD_NVM_SRAM_SIZE number of 32bits + * The buffer shall be allocated in SRAM2 + */ +#define THREAD_NVM_SRAM_SIZE (1016) + + + /** No response parameters*/ + + /* Exported type --------------------------------------------------------*/ +#define FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD (0xA94656B9) + +/* + * At startup, the information relative to the wireless binary are stored in RAM through a structure defined by + * MB_WirelessFwInfoTable_t.This structure contains 4 fields (Version,MemorySize, Stack_info and a reserved part) + * each of those coded on 32 bits as shown on the table below: + * + * + * |7 |6 |5 |4 |3 |2 |1 |0 |7 |6 |5 |4 |3 |2 |1 |0 |7 |6 |5 |4 |3 |2 |1 |0 |7 |6 |5 |4 |3 |2 |1 |0 | + * ------------------------------------------------------------------------------------------------- + * Version | Major version | Minor version | Sub version | Branch |ReleaseType| + * ------------------------------------------------------------------------------------------------- + * MemorySize | SRAM2B (kB) | SRAM2A (kB) | SRAM1 (kB) | FLASH (4kb) | + * ------------------------------------------------------------------------------------------------- + * Info stack | Reserved | Reserved | Reserved | Type (MAC,Thread,BLE) | + * ------------------------------------------------------------------------------------------------- + * Reserved | Reserved | Reserved | Reserved | Reserved | + * ------------------------------------------------------------------------------------------------- + * + */ + +/* Field Version */ +#define INFO_VERSION_MAJOR_OFFSET 24 +#define INFO_VERSION_MAJOR_MASK 0xff000000 +#define INFO_VERSION_MINOR_OFFSET 16 +#define INFO_VERSION_MINOR_MASK 0x00ff0000 +#define INFO_VERSION_SUB_OFFSET 8 +#define INFO_VERSION_SUB_MASK 0x0000ff00 +#define INFO_VERSION_BRANCH_OFFSET 4 +#define INFO_VERSION_BRANCH_MASK 0x0000000f0 +#define INFO_VERSION_TYPE_OFFSET 0 +#define INFO_VERSION_TYPE_MASK 0x00000000f + +#define INFO_VERSION_TYPE_RELEASE 1 + +/* Field Memory */ +#define INFO_SIZE_SRAM2B_OFFSET 24 +#define INFO_SIZE_SRAM2B_MASK 0xff000000 +#define INFO_SIZE_SRAM2A_OFFSET 16 +#define INFO_SIZE_SRAM2A_MASK 0x00ff0000 +#define INFO_SIZE_SRAM1_OFFSET 8 +#define INFO_SIZE_SRAM1_MASK 0x0000ff00 +#define INFO_SIZE_FLASH_OFFSET 0 +#define INFO_SIZE_FLASH_MASK 0x000000ff + +/* Field stack information */ +#define INFO_STACK_TYPE_OFFSET 0 +#define INFO_STACK_TYPE_MASK 0x000000ff +#define INFO_STACK_TYPE_NONE 0 + +#define INFO_STACK_TYPE_BLE_FULL 0x01 +#define INFO_STACK_TYPE_BLE_HCI 0x02 +#define INFO_STACK_TYPE_BLE_LIGHT 0x03 +#define INFO_STACK_TYPE_BLE_BEACON 0x04 +#define INFO_STACK_TYPE_BLE_BASIC 0x05 +#define INFO_STACK_TYPE_BLE_FULL_EXT_ADV 0x06 +#define INFO_STACK_TYPE_BLE_HCI_EXT_ADV 0x07 +#define INFO_STACK_TYPE_THREAD_FTD 0x10 +#define INFO_STACK_TYPE_THREAD_MTD 0x11 +#define INFO_STACK_TYPE_ZIGBEE_FFD 0x30 +#define INFO_STACK_TYPE_ZIGBEE_RFD 0x31 +#define INFO_STACK_TYPE_MAC 0x40 +#define INFO_STACK_TYPE_BLE_THREAD_FTD_STATIC 0x50 +#define INFO_STACK_TYPE_BLE_THREAD_FTD_DYNAMIC 0x51 +#define INFO_STACK_TYPE_BLE_THREAD_LIGHT_DYNAMIC 0x52 +#define INFO_STACK_TYPE_802154_LLD_TESTS 0x60 +#define INFO_STACK_TYPE_802154_PHY_VALID 0x61 +#define INFO_STACK_TYPE_BLE_PHY_VALID 0x62 +#define INFO_STACK_TYPE_BLE_LLD_TESTS 0x63 +#define INFO_STACK_TYPE_BLE_RLV 0x64 +#define INFO_STACK_TYPE_802154_RLV 0x65 +#define INFO_STACK_TYPE_BLE_ZIGBEE_FFD_STATIC 0x70 +#define INFO_STACK_TYPE_BLE_ZIGBEE_RFD_STATIC 0x71 +#define INFO_STACK_TYPE_BLE_ZIGBEE_FFD_DYNAMIC 0x78 +#define INFO_STACK_TYPE_BLE_ZIGBEE_RFD_DYNAMIC 0x79 +#define INFO_STACK_TYPE_RLV 0x80 +#define INFO_STACK_TYPE_BLE_MAC_STATIC 0x90 + +typedef struct { +/** + * Wireless Info + */ + uint8_t VersionMajor; + uint8_t VersionMinor; + uint8_t VersionSub; + uint8_t VersionBranch; + uint8_t VersionReleaseType; + uint8_t MemorySizeSram2B; /*< Multiple of 1K */ + uint8_t MemorySizeSram2A; /*< Multiple of 1K */ + uint8_t MemorySizeSram1; /*< Multiple of 1K */ + uint8_t MemorySizeFlash; /*< Multiple of 4K */ + uint8_t StackType; +/** + * Fus Info + */ + uint8_t FusVersionMajor; + uint8_t FusVersionMinor; + uint8_t FusVersionSub; + uint8_t FusMemorySizeSram2B; /*< Multiple of 1K */ + uint8_t FusMemorySizeSram2A; /*< Multiple of 1K */ + uint8_t FusMemorySizeFlash; /*< Multiple of 4K */ +}WirelessFwInfo_t; + + +/* Exported functions ------------------------------------------------------- */ + + /** + * SHCI_C2_FUS_GetState + * @brief Read the FUS State + * If the user is not interested by the Error code response, a null value may + * be passed as parameter + * + * Note: This command is fully supported only by the FUS. + * When the wireless firmware receives that command, it responds SHCI_FUS_CMD_NOT_SUPPORTED the first time. + * When the wireless firmware receives that command a second time, it reboots the full device with the FUS running on CPU2 + * + * @param p_rsp : return the error code when the FUS State Value = 0xFF + * @retval FUS State Values + */ + uint8_t SHCI_C2_FUS_GetState( SHCI_FUS_GetState_ErrorCode_t *p_rsp ); + + /** + * SHCI_C2_FUS_FwUpgrade + * @brief Request the FUS to install the CPU2 firmware update + * Note: This command is only supported by the FUS. + * + * @param fw_src_add: Address of the firmware image location + * @param fw_dest_add: Address of the firmware destination + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_FwUpgrade( uint32_t fw_src_add, uint32_t fw_dest_add ); + + /** + * SHCI_C2_FUS_FwDelete + * @brief Delete the wireless stack on CPU2 + * Note: This command is only supported by the FUS. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_FwDelete( void ); + + /** + * SHCI_C2_FUS_UpdateAuthKey + * @brief Request the FUS to update the authentication key + * Note: This command is only supported by the FUS. + * + * @param pCmdPacket + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_UpdateAuthKey( SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t *pParam ); + + /** + * SHCI_C2_FUS_LockAuthKey + * @brief Request the FUS to prevent any future update of the authentication key + * Note: This command is only supported by the FUS. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_LockAuthKey( void ); + + /** + * SHCI_C2_FUS_StoreUsrKey + * @brief Request the FUS to store the user key + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param pParam : command parameter + * @param p_key_index : Index allocated by the FUS to the stored key + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_StoreUsrKey( SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t *pParam, uint8_t *p_key_index ); + + /** + * SHCI_C2_FUS_LoadUsrKey + * @brief Request the FUS to load the user key into the AES + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param key_index : index of the user key to load in AES1 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_LoadUsrKey( uint8_t key_index ); + + /** + * SHCI_C2_FUS_StartWs + * @brief Request the FUS to reboot on the wireless stack + * Note: This command is only supported by the FUS. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_StartWs( void ); + + /** + * SHCI_C2_FUS_LockUsrKey + * @brief Request the FUS to lock the user key so that it cannot be updated later on + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param key_index : index of the user key to lock + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_LockUsrKey( uint8_t key_index ); + + /** + * SHCI_C2_FUS_UnloadUsrKey + * @brief Request the FUS to Unload the user key so that the CPU1 may use the AES with another Key + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param key_index : index of the user key to unload + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_UnloadUsrKey( uint8_t key_index ); + + /** + * SHCI_C2_FUS_ActivateAntiRollback + * @brief Request the FUS to enable the AntiRollback feature so that it is not possible to update the wireless firmware + * with an older version than the current one. + * Note: + * - This command is only supported by the FUS. + * - Once this feature is enabled, it is not possible anymore to disable it. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_ActivateAntiRollback( void ); + + /** + * SHCI_C2_BLE_Init + * @brief Provides parameters and starts the BLE Stack + * + * @param pCmdPacket : Parameters are described SHCI_C2_Ble_Init_Cmd_Packet_t declaration + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_BLE_Init( SHCI_C2_Ble_Init_Cmd_Packet_t *pCmdPacket ); + + /** + * SHCI_C2_THREAD_Init + * @brief Starts the THREAD Stack + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_THREAD_Init( void ); + + /** + * SHCI_C2_LLDTESTS_Init + * @brief Starts the LLD tests CLI + * + * @param param_size : Nb of bytes + * @param p_param : pointer with data to give from M4 to M0 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init( uint8_t param_size, uint8_t * p_param ); + + /** + * SHCI_C2_BLE_LLD_Init + * @brief Starts the LLD tests BLE + * + * @param param_size : Nb of bytes + * @param p_param : pointer with data to give from M4 to M0 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ); + + /** + * SHCI_C2_ZIGBEE_Init + * @brief Starts the Zigbee Stack + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_ZIGBEE_Init( void ); + + /** + * SHCI_C2_DEBUG_Init + * @brief Starts the Traces + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_DEBUG_Init( SHCI_C2_DEBUG_Init_Cmd_Packet_t *pCmdPacket ); + + /** + * SHCI_C2_FLASH_EraseActivity + * @brief Provides the information of the start and the end of a flash erase window on the CPU1 + * The protection will be active until next end of radio event. + * + * @param erase_activity: Start/End of erase activity + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FLASH_EraseActivity( SHCI_EraseActivity_t erase_activity ); + + /** + * SHCI_C2_CONCURRENT_SetMode + * @brief Enable/Disable Thread on CPU2 (M0+) + * + * @param Mode: BLE or Thread enable flag + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_CONCURRENT_SetMode( SHCI_C2_CONCURRENT_Mode_Param_t Mode ); + + /** + * SHCI_C2_CONCURRENT_GetNextBleEvtTime + * @brief Get the next BLE event date (relative time) + * + * @param Command Packet + * @retval None + */ + SHCI_CmdStatus_t SHCI_C2_CONCURRENT_GetNextBleEvtTime( SHCI_C2_CONCURRENT_GetNextBleEvtTime_Param_t *pParam ); + + /** + * SHCI_C2_CONCURRENT_EnableNext_802154_EvtNotification + * @brief Activate the next 802.15.4 event notification (one shot) + * + * @param None + * @retval None + */ + SHCI_CmdStatus_t SHCI_C2_CONCURRENT_EnableNext_802154_EvtNotification( void ); + + /** + * SHCI_C2_FLASH_StoreData + * @brief Store Data in Flash + * + * @param Ip: BLE or THREAD + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FLASH_StoreData( SHCI_C2_FLASH_Ip_t Ip ); + + /** + * SHCI_C2_FLASH_EraseData + * @brief Erase Data in Flash + * + * @param Ip: BLE or THREAD + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FLASH_EraseData( SHCI_C2_FLASH_Ip_t Ip ); + + /** + * SHCI_C2_RADIO_AllowLowPower + * @brief Allow or forbid IP_radio (802_15_4 or BLE) to enter in low power mode. + * + * @param Ip: BLE or 802_15_5 + * @param FlagRadioLowPowerOn: True or false + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower( SHCI_C2_FLASH_Ip_t Ip,uint8_t FlagRadioLowPowerOn); + + + /** + * SHCI_C2_MAC_802_15_4_Init + * @brief Starts the MAC 802.15.4 on M0 + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_MAC_802_15_4_Init( void ); + + /** + * SHCI_GetWirelessFwInfo + * @brief This function read back the information relative to the wireless binary loaded. + * Refer yourself to MB_WirelessFwInfoTable_t structure to get the significance + * of the different parameters returned. + * @param pWirelessInfo : Pointer to WirelessFwInfo_t. + * + * @retval SHCI_Success + */ + SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ); + + /** + * SHCI_C2_Reinit + * @brief This is required to allow the CPU1 to fake a set C2BOOT when it has already been set. + * In order to fake a C2BOOT, the CPU1 shall : + * - Send SHCI_C2_Reinit() + * - call SEV instruction + * WARNING: + * This function is intended to be used by the SBSFU + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_Reinit( void ); + + /** + * SHCI_C2_ExtpaConfig + * @brief Send the Ext PA configuration + * When the CPU2 receives the command, it controls the Ext PA as requested by the configuration + * This configures only which IO is used to enable/disable the ExtPA and the associated polarity + * This command has no effect on the other IO that is used to control the mode of the Ext PA (Rx/Tx) + * + * @param gpio_port: GPIOx where x can be (A..F) to select the GPIO peripheral for STM32WBxx family + * @param gpio_pin_number: This parameter can be one of GPIO_PIN_x (= LL_GPIO_PIN_x) where x can be (0..15). + * @param gpio_polarity: This parameter can be either + * - EXT_PA_ENABLED_LOW: ExtPA is enabled when GPIO is low + * - EXT_PA_ENABLED_HIGH: ExtPA is enabled when GPIO is high + * @param gpio_status: This parameter can be either + * - EXT_PA_DISABLED: Stop driving the ExtPA + * - EXT_PA_ENABLED: Drive the ExtPA according to radio activity + * (ON before the Event and OFF at the end of the event) + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_ExtpaConfig(uint32_t gpio_port, uint16_t gpio_pin_number, uint8_t gpio_polarity, uint8_t gpio_status); + + /** + * SHCI_C2_SetFlashActivityControl + * @brief Set the mechanism to be used on CPU2 to prevent the CPU1 to either write or erase in flash + * + * @param Source: It can be one of the following list + * - FLASH_ACTIVITY_CONTROL_PES : The CPU2 set the PES bit to prevent the CPU1 to either read or write in flash + * - FLASH_ACTIVITY_CONTROL_SEM7 : The CPU2 gets the semaphore 7 to prevent the CPU1 to either read or write in flash. + * This requires the CPU1 to first get semaphore 7 before erasing or writing the flash. + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t Source); + + /** + * SHCI_C2_Config + * @brief Send the system configuration to the CPU2 + * + * @param pCmdPacket: address of the buffer holding following parameters + * uint8_t PayloadCmdSize : Size of the payload - shall be SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE + * uint8_t Config1 : + * - bit0 : 0 - BLE NVM Data data are flushed in internal secure flash + * 1 - BLE NVM Data are written in SRAM cache pointed by BleNvmRamAddress + * - bit1 : 0 - THREAD NVM Data data are flushed in internal secure flash + * 1 - THREAD NVM Data are written in SRAM cache pointed by ThreadNvmRamAddress + * - bit2 : 0 - Thread EUI64 is set to new (and current) format + * 1 - Thread EUI64 is set to old format + * - bit3 to bit7 : Unused, shall be set to 0 + * uint8_t EvtMask1 : + * When a bit is set to 0, the event is not reported + * bit0 : Asynchronous Event with Sub Evt Code 0x9201 (= SHCI_SUB_EVT_ERROR_NOTIF) + * ... + * bit31 : Asynchronous Event with Sub Evt Code 0x9220 + * uint8_t Spare1 : Unused, shall be set to 0 + * uint32_t BleNvmRamAddress : + * Only considered when Config1.bit0 = 1 + * When set to 0, data are kept in internal SRAM on CPU2 + * Otherwise, data are copied in the cache pointed by BleNvmRamAddress + * The size of the buffer shall be BLE_NVM_SRAM_SIZE (number of 32bits) + * The buffer shall be allocated in SRAM2 + * uint32_t ThreadNvmRamAddress : + * Only considered when Config1.bit1 = 1 + * When set to 0, data are kept in internal SRAM on CPU2 + * Otherwise, data are copied in the cache pointed by ThreadNvmRamAddress + * The size of the buffer shall be THREAD_NVM_SRAM_SIZE (number of 32bits) + * The buffer shall be allocated in SRAM1 + * + * Please check macro definition to be used for this function + * They are defined in this file next to the definition of SHCI_OPCODE_C2_CONFIG + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket); + + /** + * SHCI_C2_802_15_4_DeInit + * @brief Deinit 802.15.4 layer (to be used before entering StandBy mode) + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_802_15_4_DeInit( void ); + + /** + * SHCI_C2_SetSystemClock + * @brief Request CPU2 to change system clock + * + * @param clockSel: It can be one of the following list + * - SET_SYSTEM_CLOCK_HSE_TO_PLL : CPU2 set system clock to PLL, PLL must be configured and started before. + * - SET_SYSTEM_CLOCK_PLL_ON_TO_HSE : CPU2 set System clock to HSE, PLL is still ON after command execution. + * - SET_SYSTEM_CLOCK_PLL_OFF_TO_HSE : CPU2 set System clock to HSE, PLL is turned OFF after command execution. + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_SetSystemClock( SHCI_C2_SET_SYSTEM_CLOCK_Cmd_Param_t clockSel ); + + +#ifdef __cplusplus +} +#endif + +#endif /*__SHCI_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl.c b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl.c new file mode 100644 index 0000000..2786e14 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl.c @@ -0,0 +1,308 @@ +/** + ****************************************************************************** + * @file hci_tl.c + * @author MCD Application Team + * @brief Function for managing HCI interface. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "ble_common.h" +#include "ble_const.h" + +#include "stm_list.h" +#include "tl.h" +#include "hci_tl.h" + +/* Private typedef -----------------------------------------------------------*/ +typedef enum +{ + HCI_TL_CMD_RESP_RELEASE, + HCI_TL_CMD_RESP_WAIT, +} HCI_TL_CmdRespStatus_t; + +/* Private defines -----------------------------------------------------------*/ + +/** + * The default HCI layer timeout is set to 33s + */ +#define HCI_TL_DEFAULT_TIMEOUT (33000) + +/* Private macros ------------------------------------------------------------*/ +/* Public variables ---------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** + * START of Section BLE_DRIVER_CONTEXT + */ +PLACE_IN_SECTION("BLE_DRIVER_CONTEXT") static volatile uint8_t hci_timer_id; +PLACE_IN_SECTION("BLE_DRIVER_CONTEXT") static tListNode HciAsynchEventQueue; +PLACE_IN_SECTION("BLE_DRIVER_CONTEXT") static TL_CmdPacket_t *pCmdBuffer; +PLACE_IN_SECTION("BLE_DRIVER_CONTEXT") HCI_TL_UserEventFlowStatus_t UserEventFlow; +/** + * END of Section BLE_DRIVER_CONTEXT + */ + +static tHciContext hciContext; +static tListNode HciCmdEventQueue; +static void (* StatusNotCallBackFunction) (HCI_TL_CmdStatus_t status); +static volatile HCI_TL_CmdRespStatus_t CmdRspStatusFlag; + +/* Private function prototypes -----------------------------------------------*/ +static void NotifyCmdStatus(HCI_TL_CmdStatus_t hcicmdstatus); +static void SendCmd(uint16_t opcode, uint8_t plen, void *param); +static void TlEvtReceived(TL_EvtPacket_t *hcievt); +static void TlInit( TL_CmdPacket_t * p_cmdbuffer ); + +/* Interface ------- ---------------------------------------------------------*/ +void hci_init(void(* UserEvtRx)(void* pData), void* pConf) +{ + StatusNotCallBackFunction = ((HCI_TL_HciInitConf_t *)pConf)->StatusNotCallBack; + hciContext.UserEvtRx = UserEvtRx; + + hci_register_io_bus (&hciContext.io); + + TlInit((TL_CmdPacket_t *)(((HCI_TL_HciInitConf_t *)pConf)->p_cmdbuffer)); + + return; +} + +void hci_user_evt_proc(void) +{ + TL_EvtPacket_t *phcievtbuffer; + tHCI_UserEvtRxParam UserEvtRxParam; + + /** + * Up to release version v1.2.0, a while loop was implemented to read out events from the queue as long as + * it is not empty. However, in a bare metal implementation, this leads to calling in a "blocking" mode + * hci_user_evt_proc() as long as events are received without giving the opportunity to run other tasks + * in the background. + * From now, the events are reported one by one. When it is checked there is still an event pending in the queue, + * a request to the user is made to call again hci_user_evt_proc(). + * This gives the opportunity to the application to run other background tasks between each event. + */ + + /** + * It is more secure to use LST_remove_head()/LST_insert_head() compare to LST_get_next_node()/LST_remove_node() + * in case the user overwrite the header where the next/prev pointers are located + */ + + if((LST_is_empty(&HciAsynchEventQueue) == FALSE) && (UserEventFlow != HCI_TL_UserEventFlow_Disable)) + { + LST_remove_head ( &HciAsynchEventQueue, (tListNode **)&phcievtbuffer ); + + if (hciContext.UserEvtRx != NULL) + { + UserEvtRxParam.pckt = phcievtbuffer; + UserEvtRxParam.status = HCI_TL_UserEventFlow_Enable; + hciContext.UserEvtRx((void *)&UserEvtRxParam); + UserEventFlow = UserEvtRxParam.status; + } + else + { + UserEventFlow = HCI_TL_UserEventFlow_Enable; + } + + if(UserEventFlow != HCI_TL_UserEventFlow_Disable) + { + TL_MM_EvtDone( phcievtbuffer ); + } + else + { + /** + * put back the event in the queue + */ + LST_insert_head ( &HciAsynchEventQueue, (tListNode *)phcievtbuffer ); + } + } + + if((LST_is_empty(&HciAsynchEventQueue) == FALSE) && (UserEventFlow != HCI_TL_UserEventFlow_Disable)) + { + hci_notify_asynch_evt((void*) &HciAsynchEventQueue); + } + + + return; +} + +void hci_resume_flow( void ) +{ + UserEventFlow = HCI_TL_UserEventFlow_Enable; + + /** + * It is better to go through the background process as it is not sure from which context this API may + * be called + */ + hci_notify_asynch_evt((void*) &HciAsynchEventQueue); + + return; +} + +int hci_send_req(struct hci_request *p_cmd, uint8_t async) +{ + (void)(async); + uint16_t opcode; + TL_CcEvt_t *pcommand_complete_event; + TL_CsEvt_t *pcommand_status_event; + TL_EvtPacket_t *pevtpacket; + uint8_t hci_cmd_complete_return_parameters_length; + HCI_TL_CmdStatus_t local_cmd_status; + + NotifyCmdStatus(HCI_TL_CmdBusy); + local_cmd_status = HCI_TL_CmdBusy; + opcode = ((p_cmd->ocf) & 0x03ff) | ((p_cmd->ogf) << 10); + + CmdRspStatusFlag = HCI_TL_CMD_RESP_WAIT; + SendCmd(opcode, p_cmd->clen, p_cmd->cparam); + + while(local_cmd_status == HCI_TL_CmdBusy) + { + hci_cmd_resp_wait(HCI_TL_DEFAULT_TIMEOUT); + + /** + * Process Cmd Event + */ + while(LST_is_empty(&HciCmdEventQueue) == FALSE) + { + LST_remove_head (&HciCmdEventQueue, (tListNode **)&pevtpacket); + + if(pevtpacket->evtserial.evt.evtcode == TL_BLEEVT_CS_OPCODE) + { + pcommand_status_event = (TL_CsEvt_t*)pevtpacket->evtserial.evt.payload; + if(pcommand_status_event->cmdcode == opcode) + { + *(uint8_t *)(p_cmd->rparam) = pcommand_status_event->status; + } + + if(pcommand_status_event->numcmd != 0) + { + local_cmd_status = HCI_TL_CmdAvailable; + } + } + else + { + pcommand_complete_event = (TL_CcEvt_t*)pevtpacket->evtserial.evt.payload; + + if(pcommand_complete_event->cmdcode == opcode) + { + hci_cmd_complete_return_parameters_length = pevtpacket->evtserial.evt.plen - TL_EVT_HDR_SIZE; + p_cmd->rlen = MIN(hci_cmd_complete_return_parameters_length, p_cmd->rlen); + memcpy(p_cmd->rparam, pcommand_complete_event->payload, p_cmd->rlen); + } + + if(pcommand_complete_event->numcmd != 0) + { + local_cmd_status = HCI_TL_CmdAvailable; + } + } + } + } + + NotifyCmdStatus(HCI_TL_CmdAvailable); + + return 0; +} + +/* Private functions ---------------------------------------------------------*/ +static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) +{ + TL_BLE_InitConf_t Conf; + + /** + * Always initialize the command event queue + */ + LST_init_head (&HciCmdEventQueue); + + pCmdBuffer = p_cmdbuffer; + + LST_init_head (&HciAsynchEventQueue); + + UserEventFlow = HCI_TL_UserEventFlow_Enable; + + /* Initialize low level driver */ + if (hciContext.io.Init) + { + + Conf.p_cmdbuffer = (uint8_t *)p_cmdbuffer; + Conf.IoBusEvtCallBack = TlEvtReceived; + hciContext.io.Init(&Conf); + } + + return; +} + +static void SendCmd(uint16_t opcode, uint8_t plen, void *param) +{ + pCmdBuffer->cmdserial.cmd.cmdcode = opcode; + pCmdBuffer->cmdserial.cmd.plen = plen; + memcpy( pCmdBuffer->cmdserial.cmd.payload, param, plen ); + + hciContext.io.Send(0,0); + + return; +} + +static void NotifyCmdStatus(HCI_TL_CmdStatus_t hcicmdstatus) +{ + if(hcicmdstatus == HCI_TL_CmdBusy) + { + if(StatusNotCallBackFunction != 0) + { + StatusNotCallBackFunction(HCI_TL_CmdBusy); + } + } + else + { + if(StatusNotCallBackFunction != 0) + { + StatusNotCallBackFunction(HCI_TL_CmdAvailable); + } + } + + return; +} + +static void TlEvtReceived(TL_EvtPacket_t *hcievt) +{ + if ( ((hcievt->evtserial.evt.evtcode) == TL_BLEEVT_CS_OPCODE) || ((hcievt->evtserial.evt.evtcode) == TL_BLEEVT_CC_OPCODE ) ) + { + LST_insert_tail(&HciCmdEventQueue, (tListNode *)hcievt); + hci_cmd_resp_release(0); /**< Notify the application a full Cmd Event has been received */ + } + else + { + LST_insert_tail(&HciAsynchEventQueue, (tListNode *)hcievt); + hci_notify_asynch_evt((void*) &HciAsynchEventQueue); /**< Notify the application a full HCI event has been received */ + } + + return; +} + +/* Weak implementation ----------------------------------------------------------------*/ +__WEAK void hci_cmd_resp_wait(uint32_t timeout) +{ + (void)timeout; + + while(CmdRspStatusFlag != HCI_TL_CMD_RESP_RELEASE); + + return; +} + +__WEAK void hci_cmd_resp_release(uint32_t flag) +{ + (void)flag; + + CmdRspStatusFlag = HCI_TL_CMD_RESP_RELEASE; + + return; +} diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl.h b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl.h new file mode 100644 index 0000000..c43c9e0 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl.h @@ -0,0 +1,196 @@ +/** + ****************************************************************************** + * @file hci_tl.h + * @author MCD Application Team + * @brief Constants and functions for HCI layer. See Bluetooth Core + * v 4.0, Vol. 2, Part E. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +#ifndef __HCI_TL_H_ +#define __HCI_TL_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "stm32_wpan_common.h" +#include "tl.h" + +/* Exported defines -----------------------------------------------------------*/ +typedef enum +{ + HCI_TL_UserEventFlow_Disable, + HCI_TL_UserEventFlow_Enable, +} HCI_TL_UserEventFlowStatus_t; + +typedef enum +{ + HCI_TL_CmdBusy, + HCI_TL_CmdAvailable +} HCI_TL_CmdStatus_t; + +/** + * @brief Structure used to manage the BUS IO operations. + * All the structure fields will point to functions defined at user level. + * @{ + */ +typedef struct +{ + int32_t (* Init) (void* pConf); /**< Pointer to HCI TL function for the IO Bus initialization */ + int32_t (* DeInit) (void); /**< Pointer to HCI TL function for the IO Bus de-initialization */ + int32_t (* Reset) (void); /**< Pointer to HCI TL function for the IO Bus reset */ + int32_t (* Receive) (uint8_t*, uint16_t); /**< Pointer to HCI TL function for the IO Bus data reception */ + int32_t (* Send) (uint8_t*, uint16_t); /**< Pointer to HCI TL function for the IO Bus data transmission */ + int32_t (* DataAck) (uint8_t*, uint16_t* len); /**< Pointer to HCI TL function for the IO Bus data ack reception */ + int32_t (* GetTick) (void); /**< Pointer to BSP function for getting the HAL time base timestamp */ +} tHciIO; +/** + * @} + */ + +/** + * @brief Contain the HCI context + * @{ + */ +typedef struct +{ + tHciIO io; /**< Manage the BUS IO operations */ + void (* UserEvtRx) (void * pData); /**< ACI events callback function pointer */ +} tHciContext; + +typedef struct +{ + HCI_TL_UserEventFlowStatus_t status; + TL_EvtPacket_t *pckt; +} tHCI_UserEvtRxParam; + +typedef struct +{ + uint8_t *p_cmdbuffer; + void (* StatusNotCallBack) (HCI_TL_CmdStatus_t status); +} HCI_TL_HciInitConf_t; + +/** + * @brief Register IO bus services. + * @param fops The HCI IO structure managing the IO BUS + * @retval None + */ +void hci_register_io_bus(tHciIO* fops); + +/** + * @brief This callback is called from either + * - IPCC RX interrupt context + * - hci_user_evt_proc() context. + * - hci_resume_flow() context + * It requests hci_user_evt_proc() to be executed. + * + * @param pdata Packet or event pointer + * @retval None + */ +void hci_notify_asynch_evt(void* pdata); + +/** + * @brief This function resume the User Event Flow which has been stopped on return + * from UserEvtRx() when the User Event has not been processed. + * + * @param None + * @retval None + */ +void hci_resume_flow(void); + + +/** + * @brief This function is called when an ACI/HCI command is sent to the CPU2 and the response is waited. + * It is called from the same context the HCI command has been sent. + * It shall not return until the command response notified by hci_cmd_resp_release() is received. + * A weak implementation is available in hci_tl.c based on polling mechanism + * The user may re-implement this function in the application to improve performance : + * - It may use UTIL_SEQ_WaitEvt() API when using the Sequencer + * - It may use a semaphore when using cmsis_os interface + * + * @param timeout: Waiting timeout + * @retval None + */ +void hci_cmd_resp_wait(uint32_t timeout); + +/** + * @brief This function is called when an ACI/HCI command response is received from the CPU2. + * A weak implementation is available in hci_tl.c based on polling mechanism + * The user may re-implement this function in the application to improve performance : + * - It may use UTIL_SEQ_SetEvt() API when using the Sequencer + * - It may use a semaphore when using cmsis_os interface + * + * @param flag: Release flag + * @retval None + */ +void hci_cmd_resp_release(uint32_t flag); + + + +/** + * END OF SECTION - FUNCTIONS TO BE IMPLEMENTED BY THE APPLICATION + ********************************************************************************************************************* + */ + + +/** + ********************************************************************************************************************* + * START OF SECTION - PROCESS TO BE CALLED BY THE SCHEDULER + */ + +/** + * @brief This process shall be called by the scheduler each time it is requested with hci_notify_asynch_evt() + * This process may send an ACI/HCI command when the svc_ctl.c module is used + * + * @param None + * @retval None + */ + +void hci_user_evt_proc(void); + +/** + * END OF SECTION - PROCESS TO BE CALLED BY THE SCHEDULER + ********************************************************************************************************************* + */ + + +/** + ********************************************************************************************************************* + * START OF SECTION - INTERFACES USED BY THE BLE DRIVER + */ + +/** + * @brief Initialize the Host Controller Interface. + * This function must be called before any data can be received + * from BLE controller. + * + * @param pData: ACI events callback function pointer + * This callback is triggered when an user event is received from + * the BLE core device. + * @param pConf: Configuration structure pointer + * @retval None + */ +void hci_init(void(* UserEvtRx)(void* pData), void* pConf); + +/** + * END OF SECTION - INTERFACES USED BY THE BLE DRIVER + ********************************************************************************************************************* + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __TL_BLE_HCI_H_ */ diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl_if.c b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl_if.c new file mode 100644 index 0000000..8e57045 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl_if.c @@ -0,0 +1,30 @@ +/** + ****************************************************************************** + * @file hci_tl_if.c + * @author MCD Application Team + * @brief Transport layer interface to BLE + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "hci_tl.h" +#include "tl.h" + + +void hci_register_io_bus(tHciIO* fops) +{ + /* Register IO bus services */ + fops->Init = TL_BLE_Init; + fops->Send = TL_BLE_SendCmd; + + return; +} diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/mbox_def.h b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/mbox_def.h new file mode 100644 index 0000000..68b71f9 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/mbox_def.h @@ -0,0 +1,280 @@ +/** + ****************************************************************************** + * @file mbox_def.h + * @author MCD Application Team + * @brief Mailbox definition + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MBOX_H +#define __MBOX_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "stm32_wpan_common.h" + + /** + * This file shall be identical between the CPU1 and the CPU2 + */ + + /** + ********************************************************************************* + * TABLES + ********************************************************************************* + */ + + /** + * Version + * [0:3] = Build - 0: Untracked - 15:Released - x: Tracked version + * [4:7] = branch - 0: Mass Market - x: ... + * [8:15] = Subversion + * [16:23] = Version minor + * [24:31] = Version major + * + * Memory Size + * [0:7] = Flash ( Number of 4k sector) + * [8:15] = Reserved ( Shall be set to 0 - may be used as flash extension ) + * [16:23] = SRAM2b ( Number of 1k sector) + * [24:31] = SRAM2a ( Number of 1k sector) + */ + typedef PACKED_STRUCT + { + uint32_t Version; + } MB_SafeBootInfoTable_t; + + typedef PACKED_STRUCT + { + uint32_t Version; + uint32_t MemorySize; + uint32_t FusInfo; + } MB_FusInfoTable_t; + + typedef PACKED_STRUCT + { + uint32_t Version; + uint32_t MemorySize; + uint32_t InfoStack; + uint32_t Reserved; + } MB_WirelessFwInfoTable_t; + + typedef struct + { + MB_SafeBootInfoTable_t SafeBootInfoTable; + MB_FusInfoTable_t FusInfoTable; + MB_WirelessFwInfoTable_t WirelessFwInfoTable; + } MB_DeviceInfoTable_t; + + typedef struct + { + uint8_t *pcmd_buffer; + uint8_t *pcs_buffer; + uint8_t *pevt_queue; + uint8_t *phci_acl_data_buffer; + } MB_BleTable_t; + + typedef struct + { + uint8_t *notack_buffer; + uint8_t *clicmdrsp_buffer; + uint8_t *otcmdrsp_buffer; + uint8_t *clinot_buffer; + } MB_ThreadTable_t; + + typedef struct + { + uint8_t *clicmdrsp_buffer; + uint8_t *m0cmd_buffer; + } MB_LldTestsTable_t; + + typedef struct + { + uint8_t *cmdrsp_buffer; + uint8_t *m0cmd_buffer; + } MB_BleLldTable_t; + + typedef struct + { + uint8_t *notifM0toM4_buffer; + uint8_t *appliCmdM4toM0_buffer; + uint8_t *requestM0toM4_buffer; + } MB_ZigbeeTable_t; + /** + * msg + * [0:7] = cmd/evt + * [8:31] = Reserved + */ + typedef struct + { + uint8_t *pcmd_buffer; + uint8_t *sys_queue; + } MB_SysTable_t; + + typedef struct + { + uint8_t *spare_ble_buffer; + uint8_t *spare_sys_buffer; + uint8_t *blepool; + uint32_t blepoolsize; + uint8_t *pevt_free_buffer_queue; + uint8_t *traces_evt_pool; + uint32_t tracespoolsize; + } MB_MemManagerTable_t; + + typedef struct + { + uint8_t *traces_queue; + } MB_TracesTable_t; + + typedef struct + { + uint8_t *p_cmdrsp_buffer; + uint8_t *p_notack_buffer; + uint8_t *evt_queue; + } MB_Mac_802_15_4_t; + + typedef struct + { + MB_DeviceInfoTable_t *p_device_info_table; + MB_BleTable_t *p_ble_table; + MB_ThreadTable_t *p_thread_table; + MB_SysTable_t *p_sys_table; + MB_MemManagerTable_t *p_mem_manager_table; + MB_TracesTable_t *p_traces_table; + MB_Mac_802_15_4_t *p_mac_802_15_4_table; + MB_ZigbeeTable_t *p_zigbee_table; + MB_LldTestsTable_t *p_lld_tests_table; + MB_BleLldTable_t *p_ble_lld_table; +} MB_RefTable_t; + +/** + * This table shall be used only in the case the CPU2 runs the FUS. + * It is used by the command SHCI_GetWirelessFwInfo() + */ +typedef struct +{ + uint32_t DeviceInfoTableState; + uint8_t Reserved1; + uint8_t LastFusActiveState; + uint8_t LastWirelessStackState; + uint8_t CurrentWirelessStackType; + uint32_t SafeBootVersion; + uint32_t FusVersion; + uint32_t FusMemorySize; + uint32_t WirelessStackVersion; + uint32_t WirelessStackMemorySize; + uint32_t WirelessFirmwareBleInfo; + uint32_t WirelessFirmwareThreadInfo; + uint32_t Reserved2; + uint64_t UID64; + uint16_t DeviceId; +} MB_FUS_DeviceInfoTable_t ; + +#ifdef __cplusplus +} +#endif + +/** + ********************************************************************************* + * IPCC CHANNELS + ********************************************************************************* + */ + +/* CPU1 CPU2 + * | (SYSTEM) | + * |----HW_IPCC_SYSTEM_CMD_RSP_CHANNEL-------------->| + * | | + * |<---HW_IPCC_SYSTEM_EVENT_CHANNEL-----------------| + * | | + * | (ZIGBEE) | + * |----HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL------------>| + * | | + * |----HW_IPCC_ZIGBEE_CMD_CLI_CHANNEL-------------->| + * | | + * |<---HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL-------| + * | | + * |<---HW_IPCC_ZIGBEE_CLI_NOTIF_ACK_CHANNEL---------| + * | | + * | (THREAD) | + * |----HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL----------->| + * | | + * |----HW_IPCC_THREAD_CLI_CMD_CHANNEL-------------->| + * | | + * |<---HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL------| + * | | + * |<---HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL--| + * | | + * | (BLE) | + * |----HW_IPCC_BLE_CMD_CHANNEL--------------------->| + * | | + * |----HW_IPCC_HCI_ACL_DATA_CHANNEL---------------->| + * | | + * |<---HW_IPCC_BLE_EVENT_CHANNEL--------------------| + * | | + * | (BLE LLD) | + * |----HW_IPCC_BLE_LLD_CMD_CHANNEL----------------->| + * | | + * |<---HW_IPCC_BLE_LLD_RSP_CHANNEL------------------| + * | | + * |<---HW_IPCC_BLE_LLD_M0_CMD_CHANNEL---------------| + * | | + * | (MAC) | + * |----HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL-------->| + * | | + * |<---HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL| + * | | + * | (BUFFER) | + * |----HW_IPCC_MM_RELEASE_BUFFER_CHANNE------------>| + * | | + * | (TRACE) | + * |<----HW_IPCC_TRACES_CHANNEL----------------------| + * | | + * + * + * + */ + + + +/** CPU1 */ +#define HW_IPCC_BLE_CMD_CHANNEL LL_IPCC_CHANNEL_1 +#define HW_IPCC_SYSTEM_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_2 +#define HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_MM_RELEASE_BUFFER_CHANNEL LL_IPCC_CHANNEL_4 +#define HW_IPCC_THREAD_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_CMD_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_HCI_ACL_DATA_CHANNEL LL_IPCC_CHANNEL_6 + +/** CPU2 */ +#define HW_IPCC_BLE_EVENT_CHANNEL LL_IPCC_CHANNEL_1 +#define HW_IPCC_SYSTEM_EVENT_CHANNEL LL_IPCC_CHANNEL_2 +#define HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_LLDTESTS_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_BLE_LLD_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_TRACES_CHANNEL LL_IPCC_CHANNEL_4 +#define HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_RSP_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL LL_IPCC_CHANNEL_5 +#endif /*__MBOX_H */ + diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c new file mode 100644 index 0000000..0936f32 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c @@ -0,0 +1,254 @@ +/** + ****************************************************************************** + * @file shci.c + * @author MCD Application Team + * @brief System HCI command implementation + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "stm32_wpan_common.h" + +#include "stm_list.h" +#include "shci_tl.h" + +/* Private typedef -----------------------------------------------------------*/ +typedef enum +{ + SHCI_TL_CMD_RESP_RELEASE, + SHCI_TL_CMD_RESP_WAIT, +} SHCI_TL_CmdRespStatus_t; + +/* Private defines -----------------------------------------------------------*/ +/** + * The default System HCI layer timeout is set to 33s + */ +#define SHCI_TL_DEFAULT_TIMEOUT (33000) + +/* Private macros ------------------------------------------------------------*/ +/* Public variables ---------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** + * START of Section SYSTEM_DRIVER_CONTEXT + */ +PLACE_IN_SECTION("SYSTEM_DRIVER_CONTEXT") static tListNode SHciAsynchEventQueue; +PLACE_IN_SECTION("SYSTEM_DRIVER_CONTEXT") static volatile SHCI_TL_CmdStatus_t SHCICmdStatus; +PLACE_IN_SECTION("SYSTEM_DRIVER_CONTEXT") static TL_CmdPacket_t *pCmdBuffer; +PLACE_IN_SECTION("SYSTEM_DRIVER_CONTEXT") SHCI_TL_UserEventFlowStatus_t SHCI_TL_UserEventFlow; +/** + * END of Section SYSTEM_DRIVER_CONTEXT + */ + +static tSHciContext shciContext; +static void (* StatusNotCallBackFunction) (SHCI_TL_CmdStatus_t status); + +static volatile SHCI_TL_CmdRespStatus_t CmdRspStatusFlag; + +/* Private function prototypes -----------------------------------------------*/ +static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus); +static void TlCmdEvtReceived(TL_EvtPacket_t *shcievt); +static void TlUserEvtReceived(TL_EvtPacket_t *shcievt); +static void TlInit( TL_CmdPacket_t * p_cmdbuffer ); + +/* Interface ------- ---------------------------------------------------------*/ +void shci_init(void(* UserEvtRx)(void* pData), void* pConf) +{ + StatusNotCallBackFunction = ((SHCI_TL_HciInitConf_t *)pConf)->StatusNotCallBack; + shciContext.UserEvtRx = UserEvtRx; + + shci_register_io_bus (&shciContext.io); + + TlInit((TL_CmdPacket_t *)(((SHCI_TL_HciInitConf_t *)pConf)->p_cmdbuffer)); + + return; +} + +void shci_user_evt_proc(void) +{ + TL_EvtPacket_t *phcievtbuffer; + tSHCI_UserEvtRxParam UserEvtRxParam; + + /** + * Up to release version v1.2.0, a while loop was implemented to read out events from the queue as long as + * it is not empty. However, in a bare metal implementation, this leads to calling in a "blocking" mode + * shci_user_evt_proc() as long as events are received without giving the opportunity to run other tasks + * in the background. + * From now, the events are reported one by one. When it is checked there is still an event pending in the queue, + * a request to the user is made to call again shci_user_evt_proc(). + * This gives the opportunity to the application to run other background tasks between each event. + */ + + /** + * It is more secure to use LST_remove_head()/LST_insert_head() compare to LST_get_next_node()/LST_remove_node() + * in case the user overwrite the header where the next/prev pointers are located + */ + if((LST_is_empty(&SHciAsynchEventQueue) == FALSE) && (SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable)) + { + LST_remove_head ( &SHciAsynchEventQueue, (tListNode **)&phcievtbuffer ); + + if (shciContext.UserEvtRx != NULL) + { + UserEvtRxParam.pckt = phcievtbuffer; + UserEvtRxParam.status = SHCI_TL_UserEventFlow_Enable; + shciContext.UserEvtRx((void *)&UserEvtRxParam); + SHCI_TL_UserEventFlow = UserEvtRxParam.status; + } + else + { + SHCI_TL_UserEventFlow = SHCI_TL_UserEventFlow_Enable; + } + + if(SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable) + { + TL_MM_EvtDone( phcievtbuffer ); + } + else + { + /** + * put back the event in the queue + */ + LST_insert_head ( &SHciAsynchEventQueue, (tListNode *)phcievtbuffer ); + } + } + + if((LST_is_empty(&SHciAsynchEventQueue) == FALSE) && (SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable)) + { + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); + } + + + return; +} + +void shci_resume_flow( void ) +{ + SHCI_TL_UserEventFlow = SHCI_TL_UserEventFlow_Enable; + + /** + * It is better to go through the background process as it is not sure from which context this API may + * be called + */ + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); + + return; +} + +void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payload, TL_EvtPacket_t * p_rsp ) +{ + Cmd_SetStatus(SHCI_TL_CmdBusy); + + pCmdBuffer->cmdserial.cmd.cmdcode = cmd_code; + pCmdBuffer->cmdserial.cmd.plen = len_cmd_payload; + + memcpy(pCmdBuffer->cmdserial.cmd.payload, p_cmd_payload, len_cmd_payload ); + CmdRspStatusFlag = SHCI_TL_CMD_RESP_WAIT; + shciContext.io.Send(0,0); + + shci_cmd_resp_wait(SHCI_TL_DEFAULT_TIMEOUT); + + /** + * The command complete of a system command does not have the header + * It starts immediately with the evtserial field + */ + memcpy( &(p_rsp->evtserial), pCmdBuffer, ((TL_EvtSerial_t*)pCmdBuffer)->evt.plen + TL_EVT_HDR_SIZE ); + + Cmd_SetStatus(SHCI_TL_CmdAvailable); + + return; +} + +/* Private functions ---------------------------------------------------------*/ +static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) +{ + TL_SYS_InitConf_t Conf; + + pCmdBuffer = p_cmdbuffer; + + LST_init_head (&SHciAsynchEventQueue); + + Cmd_SetStatus(SHCI_TL_CmdAvailable); + + SHCI_TL_UserEventFlow = SHCI_TL_UserEventFlow_Enable; + + /* Initialize low level driver */ + if (shciContext.io.Init) + { + + Conf.p_cmdbuffer = (uint8_t *)p_cmdbuffer; + Conf.IoBusCallBackCmdEvt = TlCmdEvtReceived; + Conf.IoBusCallBackUserEvt = TlUserEvtReceived; + shciContext.io.Init(&Conf); + } + + return; +} + +static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus) +{ + if(shcicmdstatus == SHCI_TL_CmdBusy) + { + if(StatusNotCallBackFunction != 0) + { + StatusNotCallBackFunction( SHCI_TL_CmdBusy ); + } + SHCICmdStatus = SHCI_TL_CmdBusy; + } + else + { + SHCICmdStatus = SHCI_TL_CmdAvailable; + if(StatusNotCallBackFunction != 0) + { + StatusNotCallBackFunction( SHCI_TL_CmdAvailable ); + } + } + + return; +} + +static void TlCmdEvtReceived(TL_EvtPacket_t *shcievt) +{ + (void)(shcievt); + shci_cmd_resp_release(0); /**< Notify the application the Cmd response has been received */ + + return; +} + +static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) +{ + LST_insert_tail(&SHciAsynchEventQueue, (tListNode *)shcievt); + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); /**< Notify the application a full HCI event has been received */ + + return; +} + +/* Weak implementation ----------------------------------------------------------------*/ +__WEAK void shci_cmd_resp_wait(uint32_t timeout) +{ + (void)timeout; + + while(CmdRspStatusFlag != SHCI_TL_CMD_RESP_RELEASE); + + return; +} + +__WEAK void shci_cmd_resp_release(uint32_t flag) +{ + (void)flag; + + CmdRspStatusFlag = SHCI_TL_CMD_RESP_RELEASE; + + return; +} + + diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.h b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.h new file mode 100644 index 0000000..74d0ff3 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.h @@ -0,0 +1,173 @@ +/** + ****************************************************************************** + * @file shci_tl.h + * @author MCD Application Team + * @brief System HCI command header for the system channel + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#ifndef __SHCI_TL_H_ +#define __SHCI_TL_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "tl.h" + +/* Exported defines -----------------------------------------------------------*/ +typedef enum +{ + SHCI_TL_UserEventFlow_Disable, + SHCI_TL_UserEventFlow_Enable, +} SHCI_TL_UserEventFlowStatus_t; + +typedef enum +{ + SHCI_TL_CmdBusy, + SHCI_TL_CmdAvailable +} SHCI_TL_CmdStatus_t; + +/** + * @brief Structure used to manage the BUS IO operations. + * All the structure fields will point to functions defined at user level. + * @{ + */ +typedef struct +{ + int32_t (* Init) (void* pConf); /**< Pointer to SHCI TL function for the IO Bus initialization */ + int32_t (* DeInit) (void); /**< Pointer to SHCI TL function for the IO Bus de-initialization */ + int32_t (* Reset) (void); /**< Pointer to SHCI TL function for the IO Bus reset */ + int32_t (* Receive) (uint8_t*, uint16_t); /**< Pointer to SHCI TL function for the IO Bus data reception */ + int32_t (* Send) (uint8_t*, uint16_t); /**< Pointer to SHCI TL function for the IO Bus data transmission */ + int32_t (* DataAck) (uint8_t*, uint16_t* len); /**< Pointer to SHCI TL function for the IO Bus data ack reception */ + int32_t (* GetTick) (void); /**< Pointer to BSP function for getting the HAL time base timestamp */ +} tSHciIO; +/** + * @} + */ + +/** + * @brief Contain the SHCI context + * @{ + */ +typedef struct +{ + tSHciIO io; /**< Manage the BUS IO operations */ + void (* UserEvtRx) (void * pData); /**< User System events callback function pointer */ +} tSHciContext; + +typedef struct +{ + SHCI_TL_UserEventFlowStatus_t status; + TL_EvtPacket_t *pckt; +} tSHCI_UserEvtRxParam; + +typedef struct +{ + uint8_t *p_cmdbuffer; + void (* StatusNotCallBack) (SHCI_TL_CmdStatus_t status); +} SHCI_TL_HciInitConf_t; + +/** + * shci_send + * @brief Send an System HCI Command + * + * @param : cmd_code = Opcode of the command + * @param : len_cmd_payload = Length of the command payload + * @param : p_cmd_payload = Address of the command payload + * @param : p_rsp_status = Address of the full buffer holding the command complete event + * @retval : None + */ +void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payload, TL_EvtPacket_t * p_rsp_status ); + +/** + * @brief Register IO bus services. + * @param fops The SHCI IO structure managing the IO BUS + * @retval None + */ +void shci_register_io_bus(tSHciIO* fops); + +/** + * @brief Interrupt service routine that must be called when the system channel + * reports a packet has been received + * + * @param pdata Packet or event pointer + * @retval None + */ +void shci_notify_asynch_evt(void* pdata); + +/** + * @brief This function resume the User Event Flow which has been stopped on return + * from UserEvtRx() when the User Event has not been processed. + * + * @param None + * @retval None + */ +void shci_resume_flow(void); + + +/** + * @brief This function is called when an System HCI Command is sent to the CPU2 and the response is waited. + * It is called from the same context the System HCI command has been sent. + * It shall not return until the command response notified by shci_cmd_resp_release() is received. + * A weak implementation is available in shci_tl.c based on polling mechanism + * The user may re-implement this function in the application to improve performance : + * - It may use UTIL_SEQ_WaitEvt() API when using the Sequencer + * - It may use a semaphore when using cmsis_os interface + * + * @param timeout: Waiting timeout + * @retval None + */ +void shci_cmd_resp_wait(uint32_t timeout); + +/** + * @brief This function is called when an System HCI command is received from the CPU2. + * A weak implementation is available in shci_tl.c based on polling mechanism + * The user may re-implement this function in the application to improve performance : + * - It may use UTIL_SEQ_SetEvt() API when using the Sequencer + * - It may use a semaphore when using cmsis_os interface + * + * + * @param flag: Release flag + * @retval None + */ +void shci_cmd_resp_release(uint32_t flag); + + +/** + * @brief This process shall be called each time the shci_notify_asynch_evt notification is received + * + * @param None + * @retval None + */ + +void shci_user_evt_proc(void); + +/** + * @brief Initialize the System Host Controller Interface. + * This function must be called before any communication on the System Channel + * + * @param UserEvtRx: System events callback function pointer + * This callback is triggered when an user event is received on + * the System Channel from CPU2. + * @param pConf: Configuration structure pointer + * @retval None + */ +void shci_init(void(* UserEvtRx)(void* pData), void* pConf); + +#ifdef __cplusplus +} +#endif + +#endif /* __SHCI_TL_H_ */ diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c new file mode 100644 index 0000000..70a6a2c --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c @@ -0,0 +1,30 @@ +/** + ****************************************************************************** + * @file shci_tl_if.c + * @author MCD Application Team + * @brief Transport layer interface to the system channel + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#include "shci_tl.h" +#include "tl.h" + + +void shci_register_io_bus(tSHciIO* fops) +{ + /* Register IO bus services */ + fops->Init = TL_SYS_Init; + fops->Send = TL_SYS_SendCmd; + + return; +} diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl.h b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl.h new file mode 100644 index 0000000..280600a --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl.h @@ -0,0 +1,372 @@ +/** + ****************************************************************************** + * @file tl.h + * @author MCD Application Team + * @brief Header for tl module + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __TL_H +#define __TL_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* Includes ------------------------------------------------------------------*/ +#include "stm32_wpan_common.h" + +/* Exported defines -----------------------------------------------------------*/ +#define TL_BLECMD_PKT_TYPE ( 0x01 ) +#define TL_ACL_DATA_PKT_TYPE ( 0x02 ) +#define TL_BLEEVT_PKT_TYPE ( 0x04 ) +#define TL_OTCMD_PKT_TYPE ( 0x08 ) +#define TL_OTRSP_PKT_TYPE ( 0x09 ) +#define TL_CLICMD_PKT_TYPE ( 0x0A ) +#define TL_OTNOT_PKT_TYPE ( 0x0C ) +#define TL_OTACK_PKT_TYPE ( 0x0D ) +#define TL_CLINOT_PKT_TYPE ( 0x0E ) +#define TL_CLIACK_PKT_TYPE ( 0x0F ) +#define TL_SYSCMD_PKT_TYPE ( 0x10 ) +#define TL_SYSRSP_PKT_TYPE ( 0x11 ) +#define TL_SYSEVT_PKT_TYPE ( 0x12 ) +#define TL_CLIRESP_PKT_TYPE ( 0x15 ) +#define TL_M0CMD_PKT_TYPE ( 0x16 ) +#define TL_LOCCMD_PKT_TYPE ( 0x20 ) +#define TL_LOCRSP_PKT_TYPE ( 0x21 ) +#define TL_TRACES_APP_PKT_TYPE ( 0x40 ) +#define TL_TRACES_WL_PKT_TYPE ( 0x41 ) + +#define TL_CMD_HDR_SIZE (4) +#define TL_EVT_HDR_SIZE (3) +#define TL_EVT_CS_PAYLOAD_SIZE (4) + +#define TL_BLEEVT_CC_OPCODE (0x0E) +#define TL_BLEEVT_CS_OPCODE (0x0F) +#define TL_BLEEVT_VS_OPCODE (0xFF) + +#define TL_BLEEVT_CC_PACKET_SIZE (TL_EVT_HDR_SIZE + sizeof(TL_CcEvt_t)) +#define TL_BLEEVT_CC_BUFFER_SIZE (sizeof(TL_PacketHeader_t) + TL_BLEEVT_CC_PACKET_SIZE) +/* Exported types ------------------------------------------------------------*/ +/**< Packet header */ +typedef PACKED_STRUCT +{ + uint32_t *next; + uint32_t *prev; +} TL_PacketHeader_t; + +/******************************************************************************* + * Event type + */ + +/** + * This the payload of TL_Evt_t for a command status event + */ +typedef PACKED_STRUCT +{ + uint8_t status; + uint8_t numcmd; + uint16_t cmdcode; +} TL_CsEvt_t; + +/** + * This the payload of TL_Evt_t for a command complete event, only used a pointer + */ +typedef PACKED_STRUCT +{ + uint8_t numcmd; + uint16_t cmdcode; + uint8_t payload[2]; +} TL_CcEvt_t; + +/** + * This the payload of TL_Evt_t for an asynchronous event, only used a pointer + */ +typedef PACKED_STRUCT +{ + uint16_t subevtcode; + uint8_t payload[2]; +} TL_AsynchEvt_t; + +/** + * This the payload of TL_Evt_t, only used a pointer + */ +typedef PACKED_STRUCT +{ + uint8_t evtcode; + uint8_t plen; + uint8_t payload[2]; +} TL_Evt_t; + +typedef PACKED_STRUCT +{ + uint8_t type; + TL_Evt_t evt; +} TL_EvtSerial_t; + +/** + * This format shall be used for all events (asynchronous and command response) reported + * by the CPU2 except for the command response of a system command where the header is not there + * and the format to be used shall be TL_EvtSerial_t. + * Note: Be careful that the asynchronous events reported by the CPU2 on the system channel do + * include the header and shall use TL_EvtPacket_t format. Only the command response format on the + * system channel is different. + */ +typedef PACKED_STRUCT +{ + TL_PacketHeader_t header; + TL_EvtSerial_t evtserial; +} TL_EvtPacket_t; + +/***************************************************************************************** + * Command type + */ + +typedef PACKED_STRUCT +{ + uint16_t cmdcode; + uint8_t plen; + uint8_t payload[255]; +} TL_Cmd_t; + +typedef PACKED_STRUCT +{ + uint8_t type; + TL_Cmd_t cmd; +} TL_CmdSerial_t; + +typedef PACKED_STRUCT +{ + TL_PacketHeader_t header; + TL_CmdSerial_t cmdserial; +} TL_CmdPacket_t; + +/***************************************************************************************** + * HCI ACL DATA type + */ +typedef PACKED_STRUCT +{ + uint8_t type; + uint16_t handle; + uint16_t length; + uint8_t acl_data[1]; +} TL_AclDataSerial_t; + +typedef PACKED_STRUCT +{ + TL_PacketHeader_t header; + TL_AclDataSerial_t AclDataSerial; +} TL_AclDataPacket_t; + +typedef struct +{ + uint8_t *p_BleSpareEvtBuffer; + uint8_t *p_SystemSpareEvtBuffer; + uint8_t *p_AsynchEvtPool; + uint32_t AsynchEvtPoolSize; + uint8_t *p_TracesEvtPool; + uint32_t TracesEvtPoolSize; +} TL_MM_Config_t; + +typedef struct +{ + uint8_t *p_ThreadOtCmdRspBuffer; + uint8_t *p_ThreadCliRspBuffer; + uint8_t *p_ThreadNotAckBuffer; + uint8_t *p_ThreadCliNotBuffer; +} TL_TH_Config_t; + +typedef struct +{ + uint8_t *p_LldTestsCliCmdRspBuffer; + uint8_t *p_LldTestsM0CmdBuffer; +} TL_LLD_tests_Config_t; + +typedef struct +{ + uint8_t *p_BleLldCmdRspBuffer; + uint8_t *p_BleLldM0CmdBuffer; +} TL_BLE_LLD_Config_t; + +typedef struct +{ + uint8_t *p_Mac_802_15_4_CmdRspBuffer; + uint8_t *p_Mac_802_15_4_NotAckBuffer; +} TL_MAC_802_15_4_Config_t; + +typedef struct +{ + uint8_t *p_ZigbeeOtCmdRspBuffer; + uint8_t *p_ZigbeeNotAckBuffer; + uint8_t *p_ZigbeeNotifRequestBuffer; +} TL_ZIGBEE_Config_t; + +/** + * @brief Contain the BLE HCI Init Configuration + * @{ + */ +typedef struct +{ + void (* IoBusEvtCallBack) ( TL_EvtPacket_t *phcievt ); + void (* IoBusAclDataTxAck) ( void ); + uint8_t *p_cmdbuffer; + uint8_t *p_AclDataBuffer; +} TL_BLE_InitConf_t; + +/** + * @brief Contain the SYSTEM HCI Init Configuration + * @{ + */ +typedef struct +{ + void (* IoBusCallBackCmdEvt) (TL_EvtPacket_t *phcievt); + void (* IoBusCallBackUserEvt) (TL_EvtPacket_t *phcievt); + uint8_t *p_cmdbuffer; +} TL_SYS_InitConf_t; + +/***************************************************************************************** + * Event type copied from ble_legacy.h + */ + +typedef PACKED_STRUCT +{ + uint8_t type; + uint8_t data[1]; +} hci_uart_pckt; + +typedef PACKED_STRUCT +{ + uint8_t evt; + uint8_t plen; + uint8_t data[1]; +} hci_event_pckt; + +typedef PACKED_STRUCT +{ + uint8_t subevent; + uint8_t data[1]; +} evt_le_meta_event; + +/** + * Vendor specific event for BLE core. + */ +typedef PACKED_STRUCT +{ + uint16_t ecode; /**< One of the BLE core event codes. */ + uint8_t data[1]; +} evt_blecore_aci; + +/* Bluetooth 48 bit address (in little-endian order). + */ +typedef uint8_t tBDAddr[6]; + + +/* Exported constants --------------------------------------------------------*/ +/* External variables --------------------------------------------------------*/ +/* Exported macros -----------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +/****************************************************************************** + * GENERAL + ******************************************************************************/ +void TL_Enable( void ); +void TL_Init( void ); + +/****************************************************************************** + * BLE + ******************************************************************************/ +int32_t TL_BLE_Init( void* pConf ); +int32_t TL_BLE_SendCmd( uint8_t* buffer, uint16_t size ); +int32_t TL_BLE_SendAclData( uint8_t* buffer, uint16_t size ); + +/****************************************************************************** + * SYSTEM + ******************************************************************************/ +int32_t TL_SYS_Init( void* pConf ); +int32_t TL_SYS_SendCmd( uint8_t* buffer, uint16_t size ); + +/****************************************************************************** + * THREAD + ******************************************************************************/ +void TL_THREAD_Init( TL_TH_Config_t *p_Config ); +void TL_OT_SendCmd( void ); +void TL_CLI_SendCmd( void ); +void TL_OT_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ); +void TL_THREAD_NotReceived( TL_EvtPacket_t * Notbuffer ); +void TL_THREAD_SendAck ( void ); +void TL_THREAD_CliSendAck ( void ); +void TL_THREAD_CliNotReceived( TL_EvtPacket_t * Notbuffer ); + +/****************************************************************************** + * LLD TESTS + ******************************************************************************/ +void TL_LLDTESTS_Init( TL_LLD_tests_Config_t *p_Config ); +void TL_LLDTESTS_SendCliCmd( void ); +void TL_LLDTESTS_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ); +void TL_LLDTESTS_SendCliRspAck( void ); +void TL_LLDTESTS_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ); +void TL_LLDTESTS_SendM0CmdAck( void ); + +/****************************************************************************** + * BLE LLD + ******************************************************************************/ +void TL_BLE_LLD_Init( TL_BLE_LLD_Config_t *p_Config ); +void TL_BLE_LLD_SendCliCmd( void ); +void TL_BLE_LLD_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ); +void TL_BLE_LLD_SendCliRspAck( void ); +void TL_BLE_LLD_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ); +void TL_BLE_LLD_SendM0CmdAck( void ); +void TL_BLE_LLD_SendCmd( void ); +void TL_BLE_LLD_ReceiveRsp( TL_CmdPacket_t * Notbuffer ); +void TL_BLE_LLD_SendRspAck( void ); +/****************************************************************************** + * MEMORY MANAGER + ******************************************************************************/ +void TL_MM_Init( TL_MM_Config_t *p_Config ); +void TL_MM_EvtDone( TL_EvtPacket_t * hcievt ); + +/****************************************************************************** + * TRACES + ******************************************************************************/ +void TL_TRACES_Init( void ); +void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ); + +/****************************************************************************** + * MAC 802.15.4 + ******************************************************************************/ +void TL_MAC_802_15_4_Init( TL_MAC_802_15_4_Config_t *p_Config ); +void TL_MAC_802_15_4_SendCmd( void ); +void TL_MAC_802_15_4_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ); +void TL_MAC_802_15_4_NotReceived( TL_EvtPacket_t * Notbuffer ); +void TL_MAC_802_15_4_SendAck ( void ); + +/****************************************************************************** + * ZIGBEE + ******************************************************************************/ +void TL_ZIGBEE_Init( TL_ZIGBEE_Config_t *p_Config ); +void TL_ZIGBEE_SendM4RequestToM0( void ); +void TL_ZIGBEE_SendM4AckToM0Notify ( void ); +void TL_ZIGBEE_NotReceived( TL_EvtPacket_t * Notbuffer ); +void TL_ZIGBEE_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ); +void TL_ZIGBEE_M0RequestReceived(TL_EvtPacket_t * Otbuffer ); +void TL_ZIGBEE_SendM4AckToM0Request(void); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif /*__TL_H */ + diff --git a/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c new file mode 100644 index 0000000..9659ee6 --- /dev/null +++ b/firmware/memory_chip_gone/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c @@ -0,0 +1,877 @@ +/** + ****************************************************************************** + * @file tl_mbox.c + * @author MCD Application Team + * @brief Transport layer for the mailbox interface + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32_wpan_common.h" +#include "hw.h" + +#include "stm_list.h" +#include "tl.h" +#include "mbox_def.h" +#include "tl_dbg_conf.h" + +/* Private typedef -----------------------------------------------------------*/ +typedef enum +{ + TL_MB_MM_RELEASE_BUFFER, + TL_MB_BLE_CMD, + TL_MB_BLE_CMD_RSP, + TL_MB_ACL_DATA, + TL_MB_ACL_DATA_RSP, + TL_MB_BLE_ASYNCH_EVT, + TL_MB_SYS_CMD, + TL_MB_SYS_CMD_RSP, + TL_MB_SYS_ASYNCH_EVT, +} TL_MB_PacketType_t; + +/* Private defines -----------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/**< reference table */ +PLACE_IN_SECTION("MAPPING_TABLE") static volatile MB_RefTable_t TL_RefTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_DeviceInfoTable_t TL_DeviceInfoTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleTable_t TL_BleTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ThreadTable_t TL_ThreadTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_LldTestsTable_t TL_LldTestsTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleLldTable_t TL_BleLldTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_SysTable_t TL_SysTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_MemManagerTable_t TL_MemManagerTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_TracesTable_t TL_TracesTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_Mac_802_15_4_t TL_Mac_802_15_4_Table; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ZigbeeTable_t TL_Zigbee_Table; + +/**< tables */ +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode FreeBufQueue; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode TracesEvtQueue; +PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t CsBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + sizeof(TL_CsEvt_t)]; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode EvtQueue; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode SystemEvtQueue; + + +static tListNode LocalFreeBufQueue; +static void (* BLE_IoBusEvtCallBackFunction) (TL_EvtPacket_t *phcievt); +static void (* BLE_IoBusAclDataTxAck) ( void ); +static void (* SYS_CMD_IoBusCallBackFunction) (TL_EvtPacket_t *phcievt); +static void (* SYS_EVT_IoBusCallBackFunction) (TL_EvtPacket_t *phcievt); + + +/* Global variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +static void SendFreeBuf( void ); +static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer); + +/* Public Functions Definition ------------------------------------------------------*/ + +/****************************************************************************** + * GENERAL - refer to AN5289 for functions description. + ******************************************************************************/ +void TL_Enable( void ) +{ + HW_IPCC_Enable(); + + return; +} + + +void TL_Init( void ) +{ + TL_RefTable.p_device_info_table = &TL_DeviceInfoTable; + TL_RefTable.p_ble_table = &TL_BleTable; + TL_RefTable.p_thread_table = &TL_ThreadTable; + TL_RefTable.p_lld_tests_table = &TL_LldTestsTable; + TL_RefTable.p_ble_lld_table = &TL_BleLldTable; + TL_RefTable.p_sys_table = &TL_SysTable; + TL_RefTable.p_mem_manager_table = &TL_MemManagerTable; + TL_RefTable.p_traces_table = &TL_TracesTable; + TL_RefTable.p_mac_802_15_4_table = &TL_Mac_802_15_4_Table; + TL_RefTable.p_zigbee_table = &TL_Zigbee_Table; + HW_IPCC_Init(); + + return; +} + +/****************************************************************************** + * BLE + ******************************************************************************/ +int32_t TL_BLE_Init( void* pConf ) +{ + MB_BleTable_t * p_bletable; + + TL_BLE_InitConf_t *pInitHciConf = (TL_BLE_InitConf_t *) pConf; + + LST_init_head (&EvtQueue); + + p_bletable = TL_RefTable.p_ble_table; + + p_bletable->pcmd_buffer = pInitHciConf->p_cmdbuffer; + p_bletable->phci_acl_data_buffer = pInitHciConf->p_AclDataBuffer; + p_bletable->pcs_buffer = (uint8_t*)CsBuffer; + p_bletable->pevt_queue = (uint8_t*)&EvtQueue; + + HW_IPCC_BLE_Init(); + + BLE_IoBusEvtCallBackFunction = pInitHciConf->IoBusEvtCallBack; + BLE_IoBusAclDataTxAck = pInitHciConf->IoBusAclDataTxAck; + + return 0; +} + +int32_t TL_BLE_SendCmd( uint8_t* buffer, uint16_t size ) +{ + (void)(buffer); + (void)(size); + + ((TL_CmdPacket_t*)(TL_RefTable.p_ble_table->pcmd_buffer))->cmdserial.type = TL_BLECMD_PKT_TYPE; + + OutputDbgTrace(TL_MB_BLE_CMD, TL_RefTable.p_ble_table->pcmd_buffer); + + HW_IPCC_BLE_SendCmd(); + + return 0; +} + +void HW_IPCC_BLE_RxEvtNot(void) +{ + TL_EvtPacket_t *phcievt; + + while(LST_is_empty(&EvtQueue) == FALSE) + { + LST_remove_head (&EvtQueue, (tListNode **)&phcievt); + + if ( ((phcievt->evtserial.evt.evtcode) == TL_BLEEVT_CS_OPCODE) || ((phcievt->evtserial.evt.evtcode) == TL_BLEEVT_CC_OPCODE ) ) + { + OutputDbgTrace(TL_MB_BLE_CMD_RSP, (uint8_t*)phcievt); + } + else + { + OutputDbgTrace(TL_MB_BLE_ASYNCH_EVT, (uint8_t*)phcievt); + } + + BLE_IoBusEvtCallBackFunction(phcievt); + } + + return; +} + +int32_t TL_BLE_SendAclData( uint8_t* buffer, uint16_t size ) +{ + (void)(buffer); + (void)(size); + + ((TL_AclDataPacket_t *)(TL_RefTable.p_ble_table->phci_acl_data_buffer))->AclDataSerial.type = TL_ACL_DATA_PKT_TYPE; + + OutputDbgTrace(TL_MB_ACL_DATA, TL_RefTable.p_ble_table->phci_acl_data_buffer); + + HW_IPCC_BLE_SendAclData(); + + return 0; +} + +void HW_IPCC_BLE_AclDataAckNot(void) +{ + OutputDbgTrace(TL_MB_ACL_DATA_RSP, (uint8_t*)NULL); + + BLE_IoBusAclDataTxAck( ); + + return; +} + +/****************************************************************************** + * SYSTEM + ******************************************************************************/ +int32_t TL_SYS_Init( void* pConf ) +{ + MB_SysTable_t * p_systable; + + TL_SYS_InitConf_t *pInitHciConf = (TL_SYS_InitConf_t *) pConf; + + LST_init_head (&SystemEvtQueue); + p_systable = TL_RefTable.p_sys_table; + p_systable->pcmd_buffer = pInitHciConf->p_cmdbuffer; + p_systable->sys_queue = (uint8_t*)&SystemEvtQueue; + + HW_IPCC_SYS_Init(); + + SYS_CMD_IoBusCallBackFunction = pInitHciConf->IoBusCallBackCmdEvt; + SYS_EVT_IoBusCallBackFunction = pInitHciConf->IoBusCallBackUserEvt; + + return 0; +} + +int32_t TL_SYS_SendCmd( uint8_t* buffer, uint16_t size ) +{ + (void)(buffer); + (void)(size); + + ((TL_CmdPacket_t *)(TL_RefTable.p_sys_table->pcmd_buffer))->cmdserial.type = TL_SYSCMD_PKT_TYPE; + + OutputDbgTrace(TL_MB_SYS_CMD, TL_RefTable.p_sys_table->pcmd_buffer); + + HW_IPCC_SYS_SendCmd(); + + return 0; +} + +void HW_IPCC_SYS_CmdEvtNot(void) +{ + OutputDbgTrace(TL_MB_SYS_CMD_RSP, (uint8_t*)(TL_RefTable.p_sys_table->pcmd_buffer) ); + + SYS_CMD_IoBusCallBackFunction( (TL_EvtPacket_t*)(TL_RefTable.p_sys_table->pcmd_buffer) ); + + return; +} + +void HW_IPCC_SYS_EvtNot( void ) +{ + TL_EvtPacket_t *p_evt; + + while(LST_is_empty(&SystemEvtQueue) == FALSE) + { + LST_remove_head (&SystemEvtQueue, (tListNode **)&p_evt); + + OutputDbgTrace(TL_MB_SYS_ASYNCH_EVT, (uint8_t*)p_evt ); + + SYS_EVT_IoBusCallBackFunction( p_evt ); + } + + return; +} + +/****************************************************************************** + * THREAD + ******************************************************************************/ +#ifdef THREAD_WB +void TL_THREAD_Init( TL_TH_Config_t *p_Config ) +{ + MB_ThreadTable_t * p_thread_table; + + p_thread_table = TL_RefTable.p_thread_table; + + p_thread_table->clicmdrsp_buffer = p_Config->p_ThreadCliRspBuffer; + p_thread_table->otcmdrsp_buffer = p_Config->p_ThreadOtCmdRspBuffer; + p_thread_table->notack_buffer = p_Config->p_ThreadNotAckBuffer; + p_thread_table->clinot_buffer = p_Config->p_ThreadCliNotBuffer; + + HW_IPCC_THREAD_Init(); + + return; +} + +void TL_OT_SendCmd( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->otcmdrsp_buffer))->cmdserial.type = TL_OTCMD_PKT_TYPE; + + HW_IPCC_OT_SendCmd(); + + return; +} + +void TL_CLI_SendCmd( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->clicmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; + + HW_IPCC_CLI_SendCmd(); + + return; +} + +void TL_THREAD_SendAck ( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->notack_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; + + HW_IPCC_THREAD_SendAck(); + + return; +} + +void TL_THREAD_CliSendAck ( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->notack_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; + + HW_IPCC_THREAD_CliSendAck(); + + return; +} + +void HW_IPCC_OT_CmdEvtNot(void) +{ + TL_OT_CmdEvtReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->otcmdrsp_buffer) ); + + return; +} + +void HW_IPCC_THREAD_EvtNot( void ) +{ + TL_THREAD_NotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->notack_buffer) ); + + return; +} + +void HW_IPCC_THREAD_CliEvtNot( void ) +{ + TL_THREAD_CliNotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->clinot_buffer) ); + + return; +} + +__WEAK void TL_OT_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ){}; +__WEAK void TL_THREAD_NotReceived( TL_EvtPacket_t * Notbuffer ){}; +__WEAK void TL_THREAD_CliNotReceived( TL_EvtPacket_t * Notbuffer ){}; + +#endif /* THREAD_WB */ + +/****************************************************************************** + * LLD TESTS + ******************************************************************************/ +#ifdef LLD_TESTS_WB +void TL_LLDTESTS_Init( TL_LLD_tests_Config_t *p_Config ) +{ + MB_LldTestsTable_t * p_lld_tests_table; + + p_lld_tests_table = TL_RefTable.p_lld_tests_table; + p_lld_tests_table->clicmdrsp_buffer = p_Config->p_LldTestsCliCmdRspBuffer; + p_lld_tests_table->m0cmd_buffer = p_Config->p_LldTestsM0CmdBuffer; + HW_IPCC_LLDTESTS_Init(); + return; +} + +void TL_LLDTESTS_SendCliCmd( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_lld_tests_table->clicmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; + HW_IPCC_LLDTESTS_SendCliCmd(); + return; +} + +void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ) +{ + TL_LLDTESTS_ReceiveCliRsp( (TL_CmdPacket_t*)(TL_RefTable.p_lld_tests_table->clicmdrsp_buffer) ); + return; +} + +void TL_LLDTESTS_SendCliRspAck( void ) +{ + HW_IPCC_LLDTESTS_SendCliRspAck(); + return; +} + +void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ) +{ + TL_LLDTESTS_ReceiveM0Cmd( (TL_CmdPacket_t*)(TL_RefTable.p_lld_tests_table->m0cmd_buffer) ); + return; +} + + +void TL_LLDTESTS_SendM0CmdAck( void ) +{ + HW_IPCC_LLDTESTS_SendM0CmdAck(); + return; +} + +__WEAK void TL_LLDTESTS_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ){}; +__WEAK void TL_LLDTESTS_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ){}; +#endif /* LLD_TESTS_WB */ + +/****************************************************************************** + * BLE LLD + ******************************************************************************/ +#ifdef BLE_LLD_WB +void TL_BLE_LLD_Init( TL_BLE_LLD_Config_t *p_Config ) +{ + MB_BleLldTable_t * p_ble_lld_table; + + p_ble_lld_table = TL_RefTable.p_ble_lld_table; + p_ble_lld_table->cmdrsp_buffer = p_Config->p_BleLldCmdRspBuffer; + p_ble_lld_table->m0cmd_buffer = p_Config->p_BleLldM0CmdBuffer; + HW_IPCC_BLE_LLD_Init(); + return; +} + +void TL_BLE_LLD_SendCliCmd( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; + HW_IPCC_BLE_LLD_SendCliCmd(); + return; +} + +void HW_IPCC_BLE_LLD_ReceiveCliRsp( void ) +{ + TL_BLE_LLD_ReceiveCliRsp( (TL_CmdPacket_t*)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer) ); + return; +} + +void TL_BLE_LLD_SendCliRspAck( void ) +{ + HW_IPCC_BLE_LLD_SendCliRspAck(); + return; +} + +void HW_IPCC_BLE_LLD_ReceiveM0Cmd( void ) +{ + TL_BLE_LLD_ReceiveM0Cmd( (TL_CmdPacket_t*)(TL_RefTable.p_ble_lld_table->m0cmd_buffer) ); + return; +} + + +void TL_BLE_LLD_SendM0CmdAck( void ) +{ + HW_IPCC_BLE_LLD_SendM0CmdAck(); + return; +} + +__WEAK void TL_BLE_LLD_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ){}; +__WEAK void TL_BLE_LLD_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ){}; + +/* Transparent Mode */ +void TL_BLE_LLD_SendCmd( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; + HW_IPCC_BLE_LLD_SendCmd(); + return; +} + +void HW_IPCC_BLE_LLD_ReceiveRsp( void ) +{ + TL_BLE_LLD_ReceiveRsp( (TL_CmdPacket_t*)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer) ); + return; +} + +void TL_BLE_LLD_SendRspAck( void ) +{ + HW_IPCC_BLE_LLD_SendRspAck(); + return; +} +#endif /* BLE_LLD_WB */ + +#ifdef MAC_802_15_4_WB +/****************************************************************************** + * MAC 802.15.4 + ******************************************************************************/ +void TL_MAC_802_15_4_Init( TL_MAC_802_15_4_Config_t *p_Config ) +{ + MB_Mac_802_15_4_t * p_mac_802_15_4_table; + + p_mac_802_15_4_table = TL_RefTable.p_mac_802_15_4_table; + + p_mac_802_15_4_table->p_cmdrsp_buffer = p_Config->p_Mac_802_15_4_CmdRspBuffer; + p_mac_802_15_4_table->p_notack_buffer = p_Config->p_Mac_802_15_4_NotAckBuffer; + + HW_IPCC_MAC_802_15_4_Init(); + + return; +} + +void TL_MAC_802_15_4_SendCmd( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_mac_802_15_4_table->p_cmdrsp_buffer))->cmdserial.type = TL_OTCMD_PKT_TYPE; + + HW_IPCC_MAC_802_15_4_SendCmd(); + + return; +} + +void TL_MAC_802_15_4_SendAck ( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_mac_802_15_4_table->p_notack_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; + + HW_IPCC_MAC_802_15_4_SendAck(); + + return; +} + +void HW_IPCC_MAC_802_15_4_CmdEvtNot(void) +{ + TL_MAC_802_15_4_CmdEvtReceived( (TL_EvtPacket_t*)(TL_RefTable.p_mac_802_15_4_table->p_cmdrsp_buffer) ); + + return; +} + +void HW_IPCC_MAC_802_15_4_EvtNot( void ) +{ + TL_MAC_802_15_4_NotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_mac_802_15_4_table->p_notack_buffer) ); + + return; +} + +__WEAK void TL_MAC_802_15_4_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ){}; +__WEAK void TL_MAC_802_15_4_NotReceived( TL_EvtPacket_t * Notbuffer ){}; +#endif + +#ifdef ZIGBEE_WB +/****************************************************************************** + * ZIGBEE + ******************************************************************************/ +void TL_ZIGBEE_Init( TL_ZIGBEE_Config_t *p_Config ) +{ + MB_ZigbeeTable_t * p_zigbee_table; + + p_zigbee_table = TL_RefTable.p_zigbee_table; + p_zigbee_table->appliCmdM4toM0_buffer = p_Config->p_ZigbeeOtCmdRspBuffer; + p_zigbee_table->notifM0toM4_buffer = p_Config->p_ZigbeeNotAckBuffer; + p_zigbee_table->requestM0toM4_buffer = p_Config->p_ZigbeeNotifRequestBuffer; + + HW_IPCC_ZIGBEE_Init(); + + return; +} + +/* Zigbee M4 to M0 Request */ +void TL_ZIGBEE_SendM4RequestToM0( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_zigbee_table->appliCmdM4toM0_buffer))->cmdserial.type = TL_OTCMD_PKT_TYPE; + + HW_IPCC_ZIGBEE_SendM4RequestToM0(); + + return; +} + +/* Used to receive an ACK from the M0 */ +void HW_IPCC_ZIGBEE_RecvAppliAckFromM0(void) +{ + TL_ZIGBEE_CmdEvtReceived( (TL_EvtPacket_t*)(TL_RefTable.p_zigbee_table->appliCmdM4toM0_buffer) ); + + return; +} + +/* Zigbee notification from M0 to M4 */ +void HW_IPCC_ZIGBEE_RecvM0NotifyToM4( void ) +{ + TL_ZIGBEE_NotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_zigbee_table->notifM0toM4_buffer) ); + + return; +} + +/* Send an ACK to the M0 for a Notification */ +void TL_ZIGBEE_SendM4AckToM0Notify ( void ) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_zigbee_table->notifM0toM4_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; + + HW_IPCC_ZIGBEE_SendM4AckToM0Notify(); + + return; +} + +/* Zigbee M0 to M4 Request */ +void HW_IPCC_ZIGBEE_RecvM0RequestToM4( void ) +{ + TL_ZIGBEE_M0RequestReceived( (TL_EvtPacket_t*)(TL_RefTable.p_zigbee_table->requestM0toM4_buffer) ); + + return; +} + +/* Send an ACK to the M0 for a Request */ +void TL_ZIGBEE_SendM4AckToM0Request(void) +{ + ((TL_CmdPacket_t *)(TL_RefTable.p_zigbee_table->requestM0toM4_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; + + HW_IPCC_ZIGBEE_SendM4AckToM0Request(); + + return; +} + + +__WEAK void TL_ZIGBEE_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ){}; +__WEAK void TL_ZIGBEE_NotReceived( TL_EvtPacket_t * Notbuffer ){}; +#endif + + + +/****************************************************************************** + * MEMORY MANAGER + ******************************************************************************/ +void TL_MM_Init( TL_MM_Config_t *p_Config ) +{ + static MB_MemManagerTable_t * p_mem_manager_table; + + LST_init_head (&FreeBufQueue); + LST_init_head (&LocalFreeBufQueue); + + p_mem_manager_table = TL_RefTable.p_mem_manager_table; + + p_mem_manager_table->blepool = p_Config->p_AsynchEvtPool; + p_mem_manager_table->blepoolsize = p_Config->AsynchEvtPoolSize; + p_mem_manager_table->pevt_free_buffer_queue = (uint8_t*)&FreeBufQueue; + p_mem_manager_table->spare_ble_buffer = p_Config->p_BleSpareEvtBuffer; + p_mem_manager_table->spare_sys_buffer = p_Config->p_SystemSpareEvtBuffer; + p_mem_manager_table->traces_evt_pool = p_Config->p_TracesEvtPool; + p_mem_manager_table->tracespoolsize = p_Config->TracesEvtPoolSize; + + return; +} + +void TL_MM_EvtDone(TL_EvtPacket_t * phcievt) +{ + LST_insert_tail(&LocalFreeBufQueue, (tListNode *)phcievt); + + OutputDbgTrace(TL_MB_MM_RELEASE_BUFFER, (uint8_t*)phcievt); + + HW_IPCC_MM_SendFreeBuf( SendFreeBuf ); + + return; +} + +static void SendFreeBuf( void ) +{ + tListNode *p_node; + + while ( FALSE == LST_is_empty (&LocalFreeBufQueue) ) + { + LST_remove_head( &LocalFreeBufQueue, (tListNode **)&p_node ); + LST_insert_tail( (tListNode*)(TL_RefTable.p_mem_manager_table->pevt_free_buffer_queue), p_node ); + } + + return; +} + +/****************************************************************************** + * TRACES + ******************************************************************************/ +void TL_TRACES_Init( void ) +{ + LST_init_head (&TracesEvtQueue); + + TL_RefTable.p_traces_table->traces_queue = (uint8_t*)&TracesEvtQueue; + + HW_IPCC_TRACES_Init(); + + return; +} + +void HW_IPCC_TRACES_EvtNot(void) +{ + TL_EvtPacket_t *phcievt; + + while(LST_is_empty(&TracesEvtQueue) == FALSE) + { + LST_remove_head (&TracesEvtQueue, (tListNode **)&phcievt); + TL_TRACES_EvtReceived( phcievt ); + } + + return; +} + +__WEAK void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ) +{ + (void)(hcievt); +} + +/****************************************************************************** +* DEBUG INFORMATION +******************************************************************************/ +static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) +{ + TL_EvtPacket_t *p_evt_packet; + TL_CmdPacket_t *p_cmd_packet; + TL_AclDataPacket_t *p_acldata_packet; + TL_EvtSerial_t *p_cmd_rsp_packet; + + switch(packet_type) + { + case TL_MB_MM_RELEASE_BUFFER: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CS_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + case TL_BLEEVT_CC_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + case TL_BLEEVT_VS_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + default: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + } + + TL_MM_DBG_MSG("\r\n"); + break; + + case TL_MB_BLE_CMD: + p_cmd_packet = (TL_CmdPacket_t*)buffer; + TL_HCI_CMD_DBG_MSG("ble cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); + if(p_cmd_packet->cmdserial.cmd.plen != 0) + { + TL_HCI_CMD_DBG_MSG(" payload:"); + TL_HCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); + } + TL_HCI_CMD_DBG_MSG("\r\n"); + + TL_HCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); + break; + + case TL_MB_ACL_DATA: + (void)p_acldata_packet; + p_acldata_packet = (TL_AclDataPacket_t*)buffer; + TL_HCI_CMD_DBG_MSG("acl_data: 0x%02X", p_acldata_packet->AclDataSerial.type); + TL_HCI_CMD_DBG_MSG("acl_data: 0x%04X", p_acldata_packet->AclDataSerial.handle); + TL_HCI_CMD_DBG_MSG("acl_data: 0x%04X", p_acldata_packet->AclDataSerial.length); + /*if(p_acldata_packet->AclDataSerial.length != 0) + { + TL_HCI_CMD_DBG_MSG(" payload:"); + TL_HCI_CMD_DBG_BUF(p_acldata_packet->AclDataSerial.acl_data, p_acldata_packet->AclDataSerial.length, ""); + }*/ + TL_HCI_CMD_DBG_MSG("\r\n"); + /*TL_HCI_CMD_DBG_RAW(&p_acldata_packet->AclDataSerial, p_acldata_packet->AclDataSerial.length+TL_CMD_HDR_SIZE);*/ + break; + + case TL_MB_ACL_DATA_RSP: + TL_HCI_CMD_DBG_MSG(" ACL Data Tx Ack received") + TL_HCI_CMD_DBG_MSG("\r\n"); + break; + + case TL_MB_BLE_CMD_RSP: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CS_OPCODE: + TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); + TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->status); + break; + + case TL_BLEEVT_CC_OPCODE: + TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); + TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[0]); + if((p_evt_packet->evtserial.evt.plen-4) != 0) + { + TL_HCI_CMD_DBG_MSG(" payload:"); + TL_HCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[1], p_evt_packet->evtserial.evt.plen-4, ""); + } + break; + + default: + TL_HCI_CMD_DBG_MSG("unknown ble rsp received: %02X", p_evt_packet->evtserial.evt.evtcode); + break; + } + + TL_HCI_CMD_DBG_MSG("\r\n"); + + TL_HCI_CMD_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_BLE_ASYNCH_EVT: + p_evt_packet = (TL_EvtPacket_t*)buffer; + if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) + { + TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + if((p_evt_packet->evtserial.evt.plen) != 0) + { + TL_HCI_EVT_DBG_MSG(" payload:"); + TL_HCI_EVT_DBG_BUF(p_evt_packet->evtserial.evt.payload, p_evt_packet->evtserial.evt.plen, ""); + } + } + else + { + TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + if((p_evt_packet->evtserial.evt.plen-2) != 0) + { + TL_HCI_EVT_DBG_MSG(" payload:"); + TL_HCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); + } + } + + TL_HCI_EVT_DBG_MSG("\r\n"); + + TL_HCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_SYS_CMD: + p_cmd_packet = (TL_CmdPacket_t*)buffer; + + TL_SHCI_CMD_DBG_MSG("sys cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); + + if(p_cmd_packet->cmdserial.cmd.plen != 0) + { + TL_SHCI_CMD_DBG_MSG(" payload:"); + TL_SHCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); + } + TL_SHCI_CMD_DBG_MSG("\r\n"); + + TL_SHCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); + break; + + case TL_MB_SYS_CMD_RSP: + p_cmd_rsp_packet = (TL_EvtSerial_t*)buffer; + switch(p_cmd_rsp_packet->evt.evtcode) + { + case TL_BLEEVT_CC_OPCODE: + TL_SHCI_CMD_DBG_MSG("sys rsp: 0x%02X", p_cmd_rsp_packet->evt.evtcode); + TL_SHCI_CMD_DBG_MSG(" cmd opcode: 0x%02X", ((TL_CcEvt_t*)(p_cmd_rsp_packet->evt.payload))->cmdcode); + TL_SHCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_cmd_rsp_packet->evt.payload))->payload[0]); + if((p_cmd_rsp_packet->evt.plen-4) != 0) + { + TL_SHCI_CMD_DBG_MSG(" payload:"); + TL_SHCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_cmd_rsp_packet->evt.payload))->payload[1], p_cmd_rsp_packet->evt.plen-4, ""); + } + break; + + default: + TL_SHCI_CMD_DBG_MSG("unknown sys rsp received: %02X", p_cmd_rsp_packet->evt.evtcode); + break; + } + + TL_SHCI_CMD_DBG_MSG("\r\n"); + + TL_SHCI_CMD_DBG_RAW(&p_cmd_rsp_packet->evt, p_cmd_rsp_packet->evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_SYS_ASYNCH_EVT: + p_evt_packet = (TL_EvtPacket_t*)buffer; + if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) + { + TL_SHCI_EVT_DBG_MSG("unknown sys evt received: %02X", p_evt_packet->evtserial.evt.evtcode); + } + else + { + TL_SHCI_EVT_DBG_MSG("sys evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_SHCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + if((p_evt_packet->evtserial.evt.plen-2) != 0) + { + TL_SHCI_EVT_DBG_MSG(" payload:"); + TL_SHCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); + } + } + + TL_SHCI_EVT_DBG_MSG("\r\n"); + + TL_SHCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + default: + break; + } + + return; +} + |