diff options
| author | Anson Bridges <bridges.anson@gmail.com> | 2026-02-17 11:37:50 -0800 |
|---|---|---|
| committer | Anson Bridges <bridges.anson@gmail.com> | 2026-02-17 11:37:50 -0800 |
| commit | fb1611c0ca99d9e609057c46507be2af8389bb7b (patch) | |
| tree | 646ac568fdad1e6cf9e1f5767295b183bc5c5441 /firmware/rf test/Debug/Core/Src/main.su | |
| parent | 6e952fe110c2a48204c8cb0a836309ab97e5979a (diff) | |
Diffstat (limited to 'firmware/rf test/Debug/Core/Src/main.su')
| -rw-r--r-- | firmware/rf test/Debug/Core/Src/main.su | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/firmware/rf test/Debug/Core/Src/main.su b/firmware/rf test/Debug/Core/Src/main.su new file mode 100644 index 0000000..5f202fd --- /dev/null +++ b/firmware/rf test/Debug/Core/Src/main.su @@ -0,0 +1,15 @@ +../Drivers/CMSIS/Include/core_cm4.h:2059:26:ITM_SendChar 16 static,ignoring_inline_asm +../Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_rcc.h:1679:22:LL_RCC_LSE_SetDriveCapability 16 static +../Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_bus.h:539:22:LL_AHB2_GRP1_EnableClock 24 static +../Core/Src/main.c:45:5:_write 32 static +../Core/Src/main.c:88:5:main 40 static +../Core/Src/main.c:224:6:SystemClock_Config 112 static +../Core/Src/main.c:275:6:PeriphCommonClock_Config 88 static +../Core/Src/main.c:300:13:MX_I2C1_Init 8 static +../Core/Src/main.c:348:13:MX_IPCC_Init 8 static +../Core/Src/main.c:374:13:MX_RF_Init 4 static +../Core/Src/main.c:395:13:MX_RTC_Init 32 static +../Core/Src/main.c:467:13:MX_SPI1_Init 8 static +../Core/Src/main.c:507:13:MX_GPIO_Init 32 static +../Core/Src/main.c:567:6:SharpMem_Init 8 static +../Core/Src/main.c:587:6:Error_Handler 4 static,ignoring_inline_asm |